S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 748

• Manufacturer Part Number: S9S12HY64J0MLL
• Description: MCU 64K FLASH AUTO 100-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-LQFP
• Controller Family/series: S12
• No. Of I/o's: 80
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Characteristics
A.14.1
In
In
748
(CPOL = 0)
(CPOL = 1)
Figure A-8
Figure A-9
(CPOL = 1)
(CPOL = 0)
(Output)
(Output)
(Output)
(Output)
(Output)
(Output)
(Output)
(Output)
1. If configured as an output.
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, bit 2... MSB.
1.If configured as output
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1,bit 2... MSB.
(Input)
(Input)
MISO
MOSI
MISO
MOSI
SCK
SCK
SCK
SCK
SS
SS
Master Mode
the timing diagram for master mode with transmission format CPHA = 0 is depicted.
the timing diagram for master mode with transmission format CPHA=1 is depicted.
Port Data
9
2
5
10
MSB IN2
2
MSB OUT2
Master MSB OUT2
4
5
MSB IN2
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
1
6
Figure A-8. SPI Master Timing (CPHA = 0)
Figure A-9. SPI Master Timing (CPHA = 1)
4
6
4
1
Bit MSB-1. . . 1
4
Bit MSB-1. . . 1
9
12
12
Bit MSB-1. . . 1
11
Bit MSB-1. . . 1
12
12
LSB IN
13
Master LSB OUT
13
LSB OUT
LSB IN
13
13
3
11
Freescale Semiconductor
3
Port Data