S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 352

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S9S12HY64J0MLL

Manufacturer Part Number
S9S12HY64J0MLL
Description
MCU 64K FLASH AUTO 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12HY64J0MLL

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Controller Family/series
S12
No. Of I/o's
80
Ram Memory Size
4KB
Cpu Speed
64MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
S12HY
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12HY64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Freescale’s Scalable Controller Area Network (S12MSCANV3)
The synchronization jump width (see the Bosch CAN specification for details) can be programmed in a
range of 1 to 4 time quanta by setting the SJW parameter.
The SYNC_SEG, TSEG1, TSEG2, and SJW parameters are set by programming the MSCAN bus timing
registers (CANBTR0, CANBTR1) (see
and
Table 9-37
9.4.4
9.4.4.1
The MSCAN module behaves as described within this specification in all normal system operating modes.
Write restrictions exist for some registers.
352
Section 9.3.2.4, “MSCAN Bus Timing Register 1
Time Segment 1
gives an overview of the CAN compliant segment settings and the related parameter values.
Modes of Operation
Normal System Operating Modes
5 .. 10
4 .. 11
5 .. 12
6 .. 13
7 .. 14
8 .. 15
9 .. 16
It is the user’s responsibility to ensure the bit time settings are in compliance
with the CAN standard.
Transmit Point
Sample Point
SYNC_SEG
Syntax
Table 9-37. CAN Standard Compliant Bit Time Segment Settings
TSEG1
3 .. 10
4 .. 11
5 .. 12
6 .. 13
7 .. 14
8 .. 15
4 .. 9
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
System expects transitions to occur on the CAN bus during this
period.
A node in transmit mode transfers a new value to the CAN bus at
this point.
A node in receive mode samples the CAN bus at this point. If the
three samples per bit option is selected, then this point marks the
position of the third sample.
Table 9-36. Time Segment Syntax
Time Segment 2
Section 9.3.2.3, “MSCAN Bus Timing Register 0
2
3
4
5
6
7
8
NOTE
(CANBTR1)”).
Description
TSEG2
1
2
3
4
5
6
7
Synchronization
Jump Width
1 .. 2
1 .. 3
1 .. 4
1 .. 4
1 .. 4
1 .. 4
1 .. 4
Freescale Semiconductor
(CANBTR0)”
SJW
0 .. 1
0 .. 2
0 .. 3
0 .. 3
0 .. 3
0 .. 3
0 .. 3

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