S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 41

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S9S12HY64J0MLL

Manufacturer Part Number
S9S12HY64J0MLL
Description
MCU 64K FLASH AUTO 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12HY64J0MLL

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Controller Family/series
S12
No. Of I/o's
80
Ram Memory Size
4KB
Cpu Speed
64MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
S12HY
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12HY64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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1.7.3.26
PP[7:0] are a general-purpose input or output pins. They can be configured as frontplane segment driver
outputs FP[7:0]. They can be configured as pulse width modulator (PWM) channels 7-0 output.
1.7.3.27
PH[7:4] are a general-purpose input or output pins. They can be configured as frontplane segment driver
outputs FP[26:23].
1.7.3.28
PH3 is a general-purpose input or output pin. It can be configured as frontplane segment driver output
FP[22]. It can be configured as the slave selection pin SS for the serial peripheral interface (SPI). It can be
configured as the serial data pin SDA as IIC module.
1.7.3.29
PH2 is a general-purpose input or output pin. It can be configured as frontplane segment driver output
FP[21]. It can be configured as the serial clock SCK of the serial peripheral interface (SPI). It can be
configured to drive the internal bus clock ECLK. ECLK can be used as a timing reference. The ECLK
output has a programmable prescaler.
1.7.3.30
PH1 is a general-purpose input or output pin. It can be configured as frontplane segment driver output
FP[20]. It can be configured as the master output (during master mode) or slave input pin (during slave
mode) MOSI of the serial peripheral interface (SPI).
1.7.3.31
PH0 is a general-purpose input or output pin. It can be configured as frontplane segment driver output
FP[19]. It can be configured as the master input (during master mode) or slave output pin (during slave
mode) MISO for the serial peripheral interface (SPI).It can be configured as the serial clock pin SCL as
IIC module.
1.7.3.32
PT[7:4] are a general-purpose input or output pins. They can be configured as frontplane segment driver
outputs FP[16:13]. They can be configured as timer (TIM0) channels 7-4. They can be configured as key
wakeup inputs.
Freescale Semiconductor
PP[7:0] / PWM[7:0] / FP[7:0] — Port P I/O Pins [7:0]
PH[7:4] / FP[26:23] — Port H I/O Pins [7:4]
PH3 / SS / SDA / FP[22]— Port H I/O Pin 3
PH2 / ECLK / SCK / FP[21] — Port H I/O Pin 2
PH1 / MOSI / FP[20] — Port H I/O Pin 1
PH0 / MISO / SCL / FP[19] — Port H I/O Pin 0
PT[7:4] / IOC0[7:4] / KWT[7:4] / FP[16:13] — Port T I/O Pins [7:4]
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Device Overview MC9S12HY/HA-Family
41

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