S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 75

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S9S12HY64J0MLL

Manufacturer Part Number
S9S12HY64J0MLL
Description
MCU 64K FLASH AUTO 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12HY64J0MLL

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Controller Family/series
S12
No. Of I/o's
80
Ram Memory Size
4KB
Cpu Speed
64MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
S12HY
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12HY64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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1
2.3.9
Freescale Semiconductor
Address 0x000D (PRR)
BKPUE
PUPBE
PUPAE
Read: Anytime
Write: Anytime
Field
Reset
6
1
0
W
R
BKGD pin pull-up Enable—Enable pull-up device on pin
This bit configures whether a pull-up device is activated, if the pin is used as input. If a pin is used as output this bit
has no effect.
1 Pull-up device enabled
0 Pull-up device disabled
Port B Pull-down Enable—Enable pull-down devices on all port input pins
This bit configures whether a pull-down device is activated on all associated port input pins. If a pin is used as output
this bit has no effect.
1 pull-down device enabled
0 pull-down device disabled
Port A Pull-down Enable—Enable pull-down devices on all port input pins
This bit configures whether a pull-down device is activated on all associated port input pins. If a pin is used as output
this bit has no effect.
1 pull-down device enabled
0 pull-down device disabled
Ports A, B Reduced Drive Register (RDRIV)
0
0
7
= Unimplemented or Reserved
Figure 2-7. Ports ABEK Reduced Drive Register (RDRIV)
0
0
6
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-8. PUCR Register Field Descriptions
0
0
5
0
0
4
Description
3
0
0
Port Integration Module (S12HYPIMV1)
0
0
2
Access: User read/write
RDPB
0
1
RDPA
0
0
75
1

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