S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 495

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S9S12HY64J0MLL

Manufacturer Part Number
S9S12HY64J0MLL
Description
MCU 64K FLASH AUTO 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12HY64J0MLL

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Controller Family/series
S12
No. Of I/o's
80
Ram Memory Size
4KB
Cpu Speed
64MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
S12HY
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12HY64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Write: Has no meaning or effect in the normal mode; only writable in special modes (test_mode = 1).
The period of the first count after a write to the TCNT registers may be a different size because the write
is not synchronized with the prescaler clock.
14.3.2.6
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0006
TSFRZ
Reset
TSWAI
Field
TEN
7
6
5
W
R
TEN
Timer Enable
0 Disables the main timer, including the counter. Can be used for reducing power consumption.
1 Allows the timer to function normally.
If for any reason the timer is not active, there is no 64 clock for the pulse accumulator because the 64 is
generated by the timer prescaler.
Timer Module Stops While in Wait
0 Allows the timer module to continue running during wait.
1 Disables the timer module when the MCU is in the wait mode. Timer interrupts cannot be used to get the MCU
TSWAI also affects pulse accumulator.
Timer Stops While in Freeze Mode
0 Allows the timer counter to continue running while in freeze mode.
1 Disables the timer counter whenever the MCU is in freeze mode. This is useful for emulation.
TSFRZ does not stop the pulse accumulator.
Timer System Control Register 1 (TSCR1)
0
7
out of wait.
= Unimplemented or Reserved
TSWAI
Figure 14-12. Timer System Control Register 1 (TSCR1)
0
6
MC9S12HY/HA-Family Reference Manual Rev. 1.04
Table 14-6. TSCR1 Field Descriptions
TSFRZ
0
5
TFFCA
0
4
Description
PRNT
0
3
Timer Module (TIM16B8CV2) Block Description
0
0
2
0
0
1
0
0
0
495

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