S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 272

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S9S12HY64J0MLL

Manufacturer Part Number
S9S12HY64J0MLL
Description
MCU 64K FLASH AUTO 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12HY64J0MLL

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Controller Family/series
S12
No. Of I/o's
80
Ram Memory Size
4KB
Cpu Speed
64MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
S12HY
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12HY64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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S12 Clock, Reset and Power Management Unit (S12CPMU) Block Description
The use of the filter function is only possible if the VCOCLK-to-OSCCLK ratio divided by two ((f
f
If enabled, the oscillator filter is sampling the incoming oscillator clock signal (EXTAL) with the
VCOCLK frequency.
Using VCOCLK, a time window is defined during which an edge of the OSCCLK is expected. In case of
OSCBW = 1 the width of this window is three VCOCLK cycles, if the OSCBW = 0 it is one VCOCLK
cycle.
The noise detection is active for certain combinations of OSCFILT[4:0] and OSCBW bit settings as shown
in
272
OSC
Table 7-24
)/2) is an integer number. This integer value must be written to the OSCFILT[4:0] bits.
If the VCOCLK frequency is higher than 25 MHz the wide bandwidth must
be selected (OSCBW = 1).
OSCFILT[4:0]
2 or 3
>=4
0
1
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 7-24. Noise Detection Settings
OSCBW
x
x
0
1
x
NOTE
Detection
disabled
disabled
disabled
active
active
disabled
active
active
active
active
Filter
Freescale Semiconductor
VCO
/

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