S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 751

• Manufacturer Part Number: S9S12HY64J0MLL
• Description: MCU 64K FLASH AUTO 100-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-LQFP
• Controller Family/series: S12
• No. Of I/o's: 80
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

In
Freescale Semiconductor
Num
1. SPI on non-motor pad ports (Port S or Por t H), or SPI on motor pad ports with all Slew Rate control disable
2. SPI on Port V with slew rate control enabled. All the SPI pins slew rate control should be enabled
3. 0.5 t
4. 0.5 t
4. MIN(8, f
5. MAX(1250, 4*t
10
11
12
13
Table A-27
1
1
2
3
4
5
6
7
8
9
rate control should be enabled
bus
bus
C
D
D
D
D
D
D
D
D
D
D
D
D
D
D
added due to internal synchronization delay
added due to internal synchronization delay, SPI on Port V with slew rate control enabled. All the SPI pins slew
bus
/4) means select minimum frequency value from 8MHZ and f
SCK frequency
SCK period
Enable lead time
Enable lag time
Clock (SCK) high or low time
Data setup time (inputs)
Data hold time (inputs)
Slave access time (time to data
active)
Slave MISO disable time
Data valid after SCK edge
Data valid after SS fall
Data hold time (outputs)
Rise and fall time inputs
Rise and fall time outputs
the timing characteristics for slave mode are listed.
bus
) means select the maximum period value from 1250ns and 4*t
Characteristic
Table A-27. SPI Slave Mode Timing Characteristics
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Symbol
t
t
t
f
t
wsck
t
t
t
vsck
lead
t
t
t
sck
sck
t
vss
t
lag
dis
t
ho
rfo
su
hi
rfi
a
MAX(1250, 4*t
4*t
Min
DC
17
—
—
—
—
—
—
—
4
4
4
8
8
bus
1
bus
bus
/4MHZ. same for the other MIN(X,Y)
)
2
bus
Typ
ns.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
MIN(0.8,f
29 + 0.5 t
220 + 0.5 t
MIN(8,f
29 + 0.5 t
Electrical Characteristics
220
Max
85
20
22
—
—
—
—
—
—
8
8
bus
2
bus
2
/4)
bus
bus
bus
/4)
(1)
(3)
(2)
(4)
3
,
Unit
MHZ
t
t
t
ns
bus
bus
bus
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
751