S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 61

• Manufacturer Part Number: S9S12HY64J0MLL
• Description: MCU 64K FLASH AUTO 100-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-LQFP
• Controller Family/series: S12
• No. Of I/o's: 80
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
Port
H
S
P
Offset or
Address
0x024C
0x024D
0x025C
0x025D
0x024A
0x024B
0x024E
0x024F
0x025A
0x025B
0x025E
0x025F
0x026F
0x0248
0x0249
0x0250
0x0257
0x0258
0x0259
0x0260
0x0261
0x0262
0x0263
0x0264
0x0265
0x0266
0x0267
0x0268
:
:
PTS—Port S Data Register
PTIS—Port S Input Register
DDRS—Port S Data Direction Register
RDRS—Port S Reduced Drive Register
PERS—Port S Pull Device Enable Register
PPSS—Port S Polarity Select Register
WOMS—Port S Wired-Or Mode Register
PTSRR Port S Routing Register
PIM Reserved
PTP—Port P Data Register
PTIP—Port P Input Register
DDRP—Port P Data Direction Register
RDRP—Port P Reduced Drive Register
PERP—Port P Pull Device Enable Register
PPSP—Port P Polarity Select Register
PTPRRH Port P Routing Register High
PTPRRL Port P Routing Register Low
PTH—Port H Data Register
PTIH—Port H Input Register
DDRH—Port H Data Direction Register
RDRH—Port H Reduced Drive Register
PERH—Port H Pull Device Enable Register
PPSH—Port H Polarity Select Register
WOMH—Port H Wired-Or Mode Register
PIM Reserved
PIM Reserved
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-2. Block Memory Map (continued)
Register
Access Reset Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
Port Integration Module (S12HYPIMV1)
0xFF
0xFF
0xFF
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
3
3
3
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