S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 767

• Manufacturer Part Number: S9S12HY64J0MLL
• Description: MCU 64K FLASH AUTO 100-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-LQFP
• Controller Family/series: S12
• No. Of I/o's: 80
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0x0030–0x0033 Reserved
0x0034–0x003F Clock and Power Management (CPMU) 1 of 2
Freescale Semiconductor
1
2
3
4
Address
Address
0x0030-
0x003C
0x003D
0x0033
0x0034
0x0035
0x0036
0x0037
0x0038
0x0039
0x003A
0x003B
0x003E
0x003F
Address
0x002F
This bit is visible at DBGCNT[7] and DBGSR[7]
This represents the contents if the Comparator A control register is blended into this address.
This represents the contents if the Comparator B control register is blended into this address
This represents the contents if the Comparator C control register is blended into this address
CPMUCLKS
RESERVED
RESERVED
CPMUCOP
CPMUFLG
DBGADLM
CPMUPLL
CPMUINT
CPMURTI
POSTDIV
ARMCOP
Reserved
REFDIV
CPMU
CPMU
CPMU
CPMU
Name
Name
SYNR
Name
W
R
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
PLLSEL
RTDEC
WCOP
Bit 7
Bit 7
Bit 7
Bit 7
RTIF
RTIE
Bit 7
VCOFRQ[1:0]
REFFRQ[1:0]
0
0
0
0
0
0
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
RSBCK
PORF
PSTP
RTR6
Bit 6
Bit 6
Bit 6
6
6
0
0
0
0
0
0
0
WRTMASK
RTR5
LVRF
Bit 5
Bit 5
FM1
Bit 5
5
5
0
0
0
0
0
0
0
0
0
LOCKIF
LOCKIE
RTR4
Bit 4
Bit 4
FM0
Bit 4
4
4
0
0
0
0
0
0
0
LOCK
RTR3
Bit 3
Bit 3
PRE
Bit 3
3
3
0
0
0
0
0
0
0
SYNDIV[5:0]
POSTDIV[4:0]
RTR2
Bit 2
Bit 2
ILAF
PCE
CR2
Bit 2
2
2
0
0
0
0
0
0
REFDIV[3:0]
Detailed Register Address Map
OSCSEL
OSCIF
OSCIE
RTR1
Bit 1
Bit 1
CR1
Bit 1
RTI
1
1
0
0
0
0
0
OSCSEL
UPOSC
RTR0
Bit 0
Bit 0
Bit 0
COP
Bit 0
CR0
Bit 0
0
0
0
0
0
0
767