S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 436

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S9S12HY64J0MLL

Manufacturer Part Number
S9S12HY64J0MLL
Description
MCU 64K FLASH AUTO 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12HY64J0MLL

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Controller Family/series
S12
No. Of I/o's
80
Ram Memory Size
4KB
Cpu Speed
64MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
S12HY
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12HY64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Serial Communication Interface (S12SCIV5)
12.3.2.9
Read: Anytime; reading accesses SCI receive data register
Write: Anytime; writing accesses SCI transmit data register; writing to R8 has no effect
436
Module Base + 0x0006
Module Base + 0x0007
SCIDRH
SCIDRH
SCIDRL
Reset
Reset
R[7:0]
T[7:0]
Field
7:0
R8
T8
7
6
W
W
R
R
Received Bit 8 — R8 is the ninth data bit received when the SCI is configured for 9-bit data format (M = 1).
Transmit Bit 8 — T8 is the ninth data bit transmitted when the SCI is configured for 9-bit data format (M = 1).
R7:R0 — Received bits seven through zero for 9-bit or 8-bit data formats
T7:T0 — Transmit bits seven through zero for 9-bit or 8-bit formats
R8
R7
T7
SCI Data Registers (SCIDRH, SCIDRL)
0
0
7
7
If the value of T8 is the same as in the previous transmission, T8 does not
have to be rewritten.The same value is transmitted until T8 is rewritten
In 8-bit data format, only SCI data register low (SCIDRL) needs to be
accessed.
When transmitting in 9-bit data format and using 8-bit write instructions,
write first to SCI data register high (SCIDRH), then SCIDRL.
= Unimplemented or Reserved
R6
T8
T6
0
0
6
6
Table 12-13. SCIDRH and SCIDRL Field Descriptions
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Figure 12-12. SCI Data Registers (SCIDRH)
Figure 12-13. SCI Data Registers (SCIDRL)
R5
T5
0
0
0
5
5
NOTE
R4
T4
0
0
0
4
4
Description
R3
T3
0
0
0
3
3
R2
T2
0
0
0
2
2
Freescale Semiconductor
R1
T1
0
0
0
1
1
R0
T0
0
0
0
0
0

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