CX28344 Conexant, CX28344 Datasheet - Page 111

• Manufacturer Part Number: CX28344
• Description: (CX2834x) Dual / Triple / Quad / Hex / Octal - Enhanced DS3 / E3 Framer
• Manufacturer: Conexant

CX28342/3/4/6/8 Data Sheet
2.5
2.5.1
28348-DSH-001-B
Joint Test Access Group (JTAG) Interface
Instructions
The CX28344 incorporates printed circuit board testability circuits in compliance
with IEEE Std. P1149.1a–1993, IEEE Standard Test Access Port and Boundary–Scan
Architecture, commonly known as JTAG (Joint Test Action Group).
The JTAG includes a Test Access Port (TAP) and several data registers. The TAP
provides a standard interface through which instructions and test data are
communicated. A Boundary Scan Description Language (BSDL) file for the
CX28344 is available from Conexant upon request.
The test access port consists of TDI, TCK, TMS, TDO, and TRST* pins. The TRST*
control bit must be manually operated by the microprocessor to take the device in and
out of reset.
In addition to the required BYPASS, SAMPLE/PRELOAD, and EXTEST
instructions, IDCODE and HIGHZ instructions are supported.
JTAG instructions along with their codes.
Table 2-9. JTAG Instruction Codes
EXTEST
SAMPLE/PRELOAD
BYPASS
IDCODE
HIGHZ
Mindspeed Technologies™
Instruction
Code
000
001
111
010
100
Table 2-9
Functional Description
lists the
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