CX28344 Conexant, CX28344 Datasheet - Page 49

• Manufacturer Part Number: CX28344
• Description: (CX2834x) Dual / Triple / Quad / Hex / Octal - Enhanced DS3 / E3 Framer
• Manufacturer: Conexant

CX28342/3/4/6/8 Data Sheet
2.1
Figure 2-2. Transmitter Line Side Outputs
28348-DSH-001-B
TXNEG
TXPOS
TCLKO
Transmitter Operation
This section describes the transmit operation of the framer.
The transmit line side interface consists of three output pins; TXPOS/TXNRZ,
TXNEG, TCLKO.
When bipolar mode is enabled, HDB3/B3ZS encoding is performed over all the
transmitted data. In this mode, encoded data is transmitted on TXPOS (transmit
positive polarity data) and TXNEG (transmit negative polarity data).
When AMI mode is enabled, data is sent in AMI code format without HDB3/B3ZS
coding. TXPOS and TXNEG are used to send the positive and negative polarity data.
When NRZ mode is enabled, TXPOS/TXNRZ is used to transmit NRZ data, and
TXNEG is unused.
The TCLKO is the clock reference output for TXPOS/TXNRZ and TXNEG output
pins. Data outputs are a full-clock period wide in all modes, and can change on
positive or negative transition of TCLKO signal. (If the LTxCkRis bit is set to 0, the
data changes on the rising edge of TCLKO, or else it changes on the falling edge of
TCLKO when bit LTxCkRis is set to 1).
changing on the rising edge of TCLKO.
The transmit system side interface for each framer consists of TXCKI, TXDATI,
TXGAPCK, TXSY, TEXT, and TEXTCK signals. Each of these pins is described in
the pinout list description.
Figure 2-3
parity mode. In this example, ExtFEBE/Cj-bit of Transmitter Overhead insertion
register is set to 1, and all others are set to 0. In addition to the TEXT overhead input
and the TXCKI clock input, the response of TEXTCK clock output is shown for
normal (TEXTCK) and inverted (TEXTCK) mode of operation. Due to these settings,
the TEXTCK clock provides a clock pulse for the three C-bits in subframe 4 (FEBE
bits). The FEBE bits are inserted through the TEXT pin and are sampled by the next
falling edge of TXCKI clock after the pulse on TEXTCK. This indicates, to the
system, that the framer expects a new FEBE bit. The data on TEXT should satisfy
setup and hold times around the falling edge of TXCKI clock when it is sampled.
TXDATI serial data input is also shown. TEXT and TXDATI have the same timing.
illustrates insertion of FEBE bits through the TEXT pin in DS3 C-bit
Mindspeed Technologies™
Figure 2-2
illustrates TXPOS and TXNEG
Functional Description
100542_005
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