CX28344 Conexant, CX28344 Datasheet - Page 177

• Manufacturer Part Number: CX28344
• Description: (CX2834x) Dual / Triple / Quad / Hex / Octal - Enhanced DS3 / E3 Framer
• Manufacturer: Conexant

Figure A-1. CS2834x Dejitter Circuitry
28348-DSH-001-B
LINECKn
DATA
Appendix A: Dejitter Circuit
The CX2834x framer dejitter circuitry consists of a 16-bit FIFO and a phase
comparator. To complete the dejitter circuitry, a low-pass filter and VCO are added.
This essentially builds a PLL that locks onto the input clock, LINECK, and clocks the
data out of the FIFO with a smoothed clock edge.
The data stream is clocked into the FIFO buffer with the incoming LINECK clock.
The data stream is clocked out of the FIFO buffer and into the remaining receiver
circuitry by RXCKI, which is a dejittered version of LINECK.
First the LINECK from the LIU is divided by 16. This is key; it ensures that the input
clock is averaged over time. This in turn allows the PLL circuitry to lock onto a wider
range of LINECK jitter and to provide the dejittered output. The RXCLI, which is the
VCO output, is divided by 16. This along with the divided LINECK are fed into a
phase detector. The output of the phase detector, VCOn, is then fed to a low-pass
filter which provides the control voltage to the VCO.
What follows is an analysis of the dejitter circuit.
CX2834x
÷16
16 bit FIFO
Detector
Phase
Mindspeed Technologies™
÷16
RXCKIn
DATA
VCOn
Analysis
4.7K
R
Low Pass Filter
2
4.7K
0.1uF
Phase Lock Loop
R
C
1
1
0.1uF
Control
VCO
Out
A
-
1