CX28344 Conexant, CX28344 Datasheet - Page 135

• Manufacturer Part Number: CX28344
• Description: (CX2834x) Dual / Triple / Quad / Hex / Octal - Enhanced DS3 / E3 Framer
• Manufacturer: Conexant

CX28342/3/4/6/8 Data Sheet
AllRxExt
Default after reset: 00(h)
Direction: Read/Write
Modification: Static
RxStfDat
RxCjDat
AllOVHDat
28348-DSH-001-B
Reserved
RxStfDat
7
X
0
0
1
1
Reserved
All Received Data is External—Set to enable presentation of the complete frame, i.e., payload
and overhead bits, through REXTCK pin. This bit is available in all framing modes. When this
bit is set, it overrides the rest of the bits in this register. Presentation of overhead bits through
the RXGAPCK pin or through the microprocessor interface in parallel to REXTCK is
determined by the Receive Overhead Control register and by the RxDLEn bit in Receive Data
Link Control register.
Received Stuff Opportunity Bits in the Data Stream—Set to enable presentation of the Stuff
Opportunity bits in the Data Stream over RXDAT pin in DS3-M13/M23 and E3-G.751 modes.
When set, RXGAPCK is not gapped over the Stuff Opportunity bit positions. When clear, the
Stuff Opportunity bits are not extracted (i.e., RXGAPCK is gapped over their bits positions).
When AllOVHDat bit in this register is set, this bit is ignored. In DS3-C Bit Parity and E3-
G.832 modes, this bit is ignored.
Received Justification Control Bits in the Data Stream—Set to enable presentation of the
Justification Control bits in the data stream over RXDAT pin in DS3-M13/M23 and E3-G.751
modes. When set, RXGAPCK is not gapped over the Justification Control bit positions. When
clear, the Justification Control bits are not extracted (i.e., RXGAPCK is gapped over their bit
positions). When AllOVHDat bit in this register is set, this bit is ignored. In DS3-C Bit Parity
and E3-G.832 modes, this bit is ignored.
All Overhead Bits Are in the Data Stream—Set to enable presentation of the complete frame
in the data stream over RXDAT pin (i.e., RXGAPCK is a nominal clock, it is not gapped).
This bit is available in all framing modes. When this bit is set, it overrides RxCjDat and
RxStfDat bits in this register. When this bit is cleared, presenting the Justification Control bits
on RXDAT (RXGAPCK gapping over Cj bit positions) is determined by RxCjDat bit in this
register, and presenting the Stuff Opportunity bits in RXDAT (RXGAPCK gapping over Stuff
bits positions) is determined by RxStfDat bit in this register. Other overhead bits are not
presented on RXDAT pin when this bit is cleared (i.e., RXGAPCK is gapped accordingly).
The following table details RXGAPCK output behavior in different modes according to these
bit settings:
6
RxCjDat
Receive Overhead Control Register (CR12i)
X
0
1
0
1
Reserved
5
Mindspeed Technologies™
AllOVHDat
1
0
0
0
0
Reserved
4
Nominal
Tick on Payload bits only (also not on Stuff Opportunity bits)
Ticks only on Payload bits and on Justification Control bits (in DS3-
M13/M23 and in E3-G.751)
Ticks only on Payload bits and on Stuff Opportunity bits (in DS3-
M13/M23 and in E3-G.751)
Ticks on Payload, Stuff Opportunity, and Justification Control bits
(in DS3-M13/M23 and in E3-G.751)
Reserved
3
RXGAPCK Output Behavior
RxStfDat
2
RxCjDat
1
AllOVHDat
0
Registers
3
-
23