CX28344 Conexant, CX28344 Datasheet - Page 139

• Manufacturer Part Number: CX28344
• Description: (CX2834x) Dual / Triple / Quad / Hex / Octal - Enhanced DS3 / E3 Framer
• Manufacturer: Conexant

CX28342/3/4/6/8 Data Sheet
Default after reset: 00(h)
Direction: Read/Write
Modification: Dynamic
FEBEErr
XDgrErr
YelErr
CPErr
ParDgrErr
ParErr
FrmErrM
FrmErrF
28348-DSH-001-B
FEBEErr
7
FEBE Error Insertion Control—Causes insertion of a FEBE error at the next opportunity. A
FEBE error means transmission of the opposite of the expected code.
In DS3 C-bit Parity mode, a FEBE error is the transmission of 111, when a frame bit error or a
C-bit parity is detected, and transmission of the FEBE error code (written in FEBEC/PT field
in Feature1 control register) when none of these errors is detected.
In E3-G.832 mode, REI (FEBE) bit is cleared to 0 when a BIP-8 error is detected in the EM
byte and set to 1 when the parity check in the EM byte is correct.
X-Bits Disagreement Error Insertion Control—Causes insertion of X-bits disagreement (i.e.,
the two X-bits in an M-frame are not equal) at the next opportunity. Valid in only DS3 mode.
Yellow Alarm Error Insertion Control—Causes insertion of RAI/RDI error at the next
opportunity. RAI error means transmission opposite of the expected value.
In DS3 mode, the two X-bits are set to 1 if an RAI should be transmitted and cleared to 0 if
RAI is not expected.
In E3-G.751 mode, The A-bit is cleared to 0 if an RAI should be transmitted and set to 1 if a
RAI is not expected.
In E3-G.832 mode, RDI bit clears to 0 if an RAI should be transmitted, and set to 1 if an RAI
is not expected.
C-Bit Parity Error Insertion Control—Causes insertion of a CP error at the next opportunity. A
CP error means transmission of an incorrect value in the three CP-bits. Valid only in DS3 C-
Bit Parity mode.
Parity Bits Disagreement Error Insertion Control—Causes insertion of P-bits disagreement
(i.e., the two P-bits in an M-frame are not equal) at the next opportunity. Valid only in DS3
mode.
Parity Error Insertion Control—Causes insertion of a parity error at the next opportunity.
In DS3 mode, the error means transmission of an incorrect value in the two P-bits.
In E3-G.832 mode, the error means transmission of a single incorrect bit in BIP-8 field (EM
byte).
Frame Error in M-Bit Insertion Control—Causes insertion of a single error (inversion) in one
M-bit at the next opportunity. Valid only in DS3 mode.
Frame Error in F/FAS/FA Insertion Control—Causes insertion of a single frame error at the
next opportunity.
In DS3 mode, causes inversion of a single F-bit.
In E3-G.751 mode, causes inversion of a single bit in the next FAS field.
In E3-G.832 mode, causes inversion of a single bit in the next FA field.
XdgrErr
6
Error Insertion1 Control Register (CR19i)
YelErr
5
Mindspeed Technologies™
CPErr
4
ParDgrErr
3
ParErr
2
FrmErrM
1
FrmErrF
0
Registers
3
-
27