CX28344 Conexant, CX28344 Datasheet - Page 87
CX28344
Manufacturer Part Number
CX28344
Description
(CX2834x) Dual / Triple / Quad / Hex / Octal - Enhanced DS3 / E3 Framer
Manufacturer
Conexant
Datasheet
1.CX28344.pdf
(195 pages)
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CX28342/3/4/6/8 Data Sheet
2.2.4
2.2.4.1
28348-DSH-001-B
Overhead Bit Recovery
The bit stream arriving from the line-side is functionally divided into two categories,
payload and overhead. See
Processing of Overhead Bits
The Overhead bits are processed in several ways, they are as follows:
External-Data—All overhead and payload bits exit on the RXDAT pin; a gapped
clock is supplied for skipping Overhead bits, RXGAPCK (see
clock’s gaps come in one of five types: all Overhead bits, all Overhead bits except
Justification Control bits, all Overhead bits except Stuff Opportunity bits, all
Overhead bits except justification control and Stuff Opportunity bits, or none are
gapped (software-selectable by setting the AllOVHDat and RxCjDat fields of the
Receive Overhead Control register).
Internal—Several fields are internally evaluated for alarm and status detection
(framing bits, RAI/RDI, FEBE/REI, parity, and path parity bits) or supplied to the
system via microprocessor-side buffers or registers (DL, FEAC, PT, PD/MI, TM/
SSM, and AIC), described in
External-Extended—All overhead and payload bits exit on the RXDAT pin; a clock is
supplied for marking various sets of overhead and payload bits (REXTCK) (see
Figure
!
!
!
In DS3 C-bit Parity, the eight independently-selectable field combinations are as
follows:
" F-bits + M-bits + X-bits + P-bits
" Cb11 (AIC)
" Cb13 (FEAC)
" Cb3 (Path Parity)
" Cb4 (FEBE)
" Cb5 (Data Link)
" Cb12 + Cb2 + Cb6 + Cb7 (Reserved)
" All Overhead bits + all the payload (effectively a full serial stream)
In DS3 M13/M23, the four independently-selectable field combinations are as
follows:
" F-bits + M-bits + X-bits + P-bits
" C-bits
" Stuff bits
" All Overhead bits + all the payload (effectively a full serial stream)
In E3-G.751, the six independently-selectable field combinations are as follows:
" FAS
" A-bit
" N-bit
" C
" Stuff bits
" All Overhead bits + all the payload (effectively a full serial stream)
2-16). The output is based on the settings of REXTCK Control register fields:
j-
bits
Mindspeed Technologies™
Appendix
Section
B.
2..
Figure
Functional Description
2-15). This
2
-
41
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