CX28344 Conexant, CX28344 Datasheet - Page 17

• Manufacturer Part Number: CX28344
• Description: (CX2834x) Dual / Triple / Quad / Hex / Octal - Enhanced DS3 / E3 Framer
• Manufacturer: Conexant

CX28342/3/4/6/8 Data Sheet
Table 1-2. CX28342/3/4 Pins
28348-DSH-001-B
RESET*
VGG[1:2]
VDD1[1:5]
VDDO[1:15]
VSSO[1:8]
TRISMOD
VSS1[1:8]
VSS_GN[1:6] 21, 24, 29,
TESTMOD1
TESTMOD2
ONESEC
FOOTNOTE:
(1)
Pin Label
During reset, TXCKI and LINECK (and RXCKI, if Rx dejitter FIFO buffer is to be used) clocks should be supplied for normal
operation.
68
66, 136
10, 47, 85,
99, 119
6, 19, 28,
41, 52, 63,
67, 78, 84,
96, 98,
103, 116,
129, 139
1, 36, 37,
72, 73,
108, 109,
144
69
11, 20, 48,
53, 86, 97,
120, 128
32, 56,
117
70
74
71
CX28342
Pin #
68
66, 136
10, 47, 85,
99, 119
6, 19, 28,
41, 52, 63,
67, 78, 84,
96, 98,
103, 116,
129, 139
1, 36, 37,
72, 73,
108, 109,
144
69
11, 20, 48,
53, 86, 97,
120, 128
29, 32, 56
70
74
71
CX28343
Pin #
68
66, 136
10, 47, 85, 99,
119
6, 19, 28, 41, 52,
63, 67, 78, 84,
96, 98, 103, 116,
129, 139
1, 36, 37, 72, 73,
108, 109, 144
69
11, 20, 48, 53,
86, 97, 120, 128
70
74
71
CX28344 Pin #
Mindspeed Technologies™
—
General reset
Voltage
supply
Core Supply
Voltage
Output
Drivers
Supply
Voltage
Ground
Three-state
Mode
Ground
Ground
Test Mode 1
Test Mode 2
One-Second
Timer
Signal Name
IOZPD
IPD
IPD
IPD
I/O
PC
GC
—
PI
GI
I
I
Resets all counters and registers to their
default values (active low)
These pins must be connected to 5 V if 5
V input tolerance is required; if not, it
must be connected to 3.3 V.
these pins.
Note: Refer to
Sequence of VDDx and
These pins must be connected to a 3.3 V
power supply.
Note: Refer to
Sequence of VDDx and
inputs on the device to drive High Z,
regardless of the state of the internal state
machines, and the frame processing
taking place at the same time. Setting this
pin low enable the output/inputs to
normal driving state.
Must be connected to ground.
For Conexant use only. Must be
connected to ground.
For Conexant use only. Must be
connected to ground.
Controls or marks one-second interval
used for counter latching. When input,
the timer is aligned to ONESEC rising
edge. When output, rising edge indicates
start of each one-second interval. When
output, derived from TXCKI1 clock of the
first framer. The ONESEC pulse length is
16 clocks.
The core is provided with 2.5 V using
These are 3.3 V ground pins.
Setting this pin high forces all the output/
These are 2.5 V ground pins.
Section 4, Power Ramp
Section 4, Power Ramp
Definition
VDDOx.
VDDOx.
Product Description
(1)
.
1
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7