LPC2468FBD208,551 NXP Semiconductors, LPC2468FBD208,551 Datasheet - Page 135

• Manufacturer Part Number: LPC2468FBD208,551
• Description: IC ARM7 MCU FLASH 512K 208-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FBD208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4261; 935282457551; LPC2468FBD208-S

NXP Semiconductors
Table 120. Pin description
UM10237_4
User manual
Symbol
P4[24]/OE
P4[25]/WE
P4[26]/BLS0
P4[27]/BLS1
P4[28]/MAT2[0]/
TXD3
P4[29]/MAT2[1]/
RXD3
P4[30]/CS0
P4[31]/CS1
ALARM
USB_D−2
DBGEN
TDO
TDI
TMS
TRST
TCK
RTCK
RSTOUT
RESET
XTAL1
XTAL2
RTCX1
RTCX2
Ball
C8
D9
K13
F14
D10
B9
C7
E7
H5
N2
E5
B1
C3
C2
D4
D2
C4
H2
J1
L2
K4
J2
J3
[7]
[8]
[8]
[8]
[1]
[1]
[1]
[1]
[8]
[1]
[1]
[1]
[8]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
…continued
Type
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
O
I/O
O
I
I/O
O
I/O
O
O
I/O
I
O
I
I
I
I
I/O
O
I
I
O
I
O
Description
P4[24] — General purpose digital input/output pin.
OE — LOW active Output Enable signal.
P4[25] — General purpose digital input/output pin.
WE — LOW active Write Enable signal.
P4[26] — General purpose digital input/output pin.
BLS0 — LOW active Byte Lane select signal 0.
P4[27] — General purpose digital input/output pin.
BLS1 — LOW active Byte Lane select signal 1.
P4[28] — General purpose digital input/output pin.
MAT2[0] — Match output for Timer 2, channel 0.
TXD3 — Transmitter output for UART3.
P4[29] — General purpose digital input/output pin.
MAT2[1] — Match output for Timer 2, channel 1.
RXD3 — Receiver input for UART3.
P4[30] — General purpose digital input/output pin.
CS0 — LOW active Chip Select 0 signal.
P4[31] — General purpose digital input/output pin.
CS1 — LOW active Chip Select 1 signal.
ALARM — RTC controlled output. This is a 1.8 V pin. It goes HIGH when a RTC
alarm is generated.
USB_D−2 — USB port 2 bidirectional D− line.
DBGEN — JTAG interface control signal. Also used for boundary scan.
TDO — Test Data Out for JTAG interface.
TDI — Test Data In for JTAG interface.
TMS — Test Mode Select for JTAG interface.
TRST — Test Reset for JTAG interface.
TCK — Test Clock for JTAG interface. This clock must be slower than
CPU clock (CCLK) for the JTAG interface to operate.
RTCK — JTAG interface control signal.
Note: LOW on this pin while RESET is LOW enables ETM pins (P2[9:0]) to
operate as Trace port after reset.
RSTOUT — This is a 3.3 V pin. LOW on this pin indicates UM10237 being in
Reset state.
external reset input: A LOW on this pin resets the device, causing I/O ports and
peripherals to take on their default states, and processor execution to begin at
address 0. TTL with hysteresis, 5 V tolerant.
Input to the oscillator circuit and internal clock generator circuits.
Output from the oscillator amplifier.
Input to the RTC oscillator circuit.
Output from the RTC oscillator circuit.
Rev. 04 — 26 August 2009
Chapter 8: LPC24XX Pin configuration
UM10237
© NXP B.V. 2009. All rights reserved.
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