LPC2468FBD208,551 NXP Semiconductors, LPC2468FBD208,551 Datasheet - Page 353

IC ARM7 MCU FLASH 512K 208-LQFP

LPC2468FBD208,551

Manufacturer Part Number
LPC2468FBD208,551
Description
IC ARM7 MCU FLASH 512K 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2468FBD208,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4261
935282457551
LPC2468FBD208-S

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Table 326. USB Command Code register (USBCmdCode - address 0xFFE0 C210) bit description
Table 328. USB DMA Request Status register (USBDMARSt - address 0xFFE0 C250) bit allocation
Reset value: 0x0000 0000
UM10237_4
User manual
Bit
7:0
15:8
23:16 CMD_CODE/
31:24 -
Bit
Symbol
Bit
Symbol
Symbol
-
CMD_PHASE
CMD_WDATA
9.7.2 USB Command Data register (USBCmdData - 0xFFE0 C214)
9.8.1 USB DMA Request Status register (USBDMARSt - 0xFFE0 C250)
EP31
EP23
9.8 DMA registers
31
23
-
Value
-
0x01
0x02
0x05
This register contains the data retrieved after executing a SIE command. When the data is
ready to be read, the CD_FULL bit of the USBDevIntSt register is set. See
for details. USBCmdData is a read only register.
Table 327. USB Command Data register (USBCmdData - address 0xFFE0 C214) bit
The registers in this group are used for the DMA mode of operation (see
“DMA
A bit in this register associated with a non-isochronous endpoint is set by hardware when
an endpoint interrupt occurs (see the description of USBEpIntSt) and the corresponding
bit in USBEpIntEn is 0. A bit associated with an isochronous endpoint is set when the
corresponding bit in USBEpIntEn is 0 and a FRAME interrupt occurs. A set bit serves as
a flag for the DMA engine to start the data transfer if the DMA is enabled for the
corresponding endpoint in the USBEpDMASt register. The DMA cannot be enabled for
control endpoints (EP0 and EP1). USBDMARSt is a read only register.
Bit
7:0
31:8
EP30
EP22
operation”)
30
22
Symbol
CMD_RDATA
-
description
Description
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
The command phase:
Read
Write
Command
This is a multi-purpose field. When CMD_PHASE is
Command or Read, this field contains the code for the
command (CMD_CODE). When CMD_PHASE is Write,
this field contains the command write data (CMD_WDATA).
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
EP29
EP21
29
21
Rev. 04 — 26 August 2009
Description
Command Read Data.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
EP28
EP20
28
20
Chapter 13: LPC24XX USB device controller
EP27
EP19
27
19
EP26
EP18
26
18
EP25
EP17
Reset value
NA
0x00
0x00
NA
25
17
UM10237
© NXP B.V. 2009. All rights reserved.
Section 13–14
Table 13–298
Reset value
0x00
NA
EP24
EP16
353 of 792
24
16

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