LPC2468FBD208,551 NXP Semiconductors, LPC2468FBD208,551 Datasheet - Page 354

IC ARM7 MCU FLASH 512K 208-LQFP

LPC2468FBD208,551

Manufacturer Part Number
LPC2468FBD208,551
Description
IC ARM7 MCU FLASH 512K 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2468FBD208,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4261
935282457551
LPC2468FBD208-S

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NXP Semiconductors
Table 329. USB DMA Request Status register (USBDMARSt - address 0xFFE0 C250) bit description
[1]
Table 330. USB DMA Request Clear register (USBDMARClr - address 0xFFE0 C254) bit description
UM10237_4
User manual
Bit
0
1
31:2
Bit
0
1
31:2
Bit
Symbol
Bit
Symbol
DMA can not be enabled for this endpoint and the corresponding bit in the USBDMARSt must be 0.
Symbol
EP0
EP1
EPxx
Symbol
EP0
EP1
EPxx
9.8.2 USB DMA Request Clear register (USBDMARClr - 0xFFE0 C254)
9.8.3 USB DMA Request Set register (USBDMARSet - 0xFFE0 C258)
EP15
EP7
15
7
Value
0
0
0
1
Value
0
0
0
1
Writing one to a bit in this register will clear the corresponding bit in the USBDMARSt
register. Writing zero has no effect.
This register is intended for initialization prior to enabling the DMA for an endpoint. When
the DMA is enabled for an endpoint, hardware clears the corresponding bit in
USBDMARSt on completion of a packet transfer. Therefore, software should not clear the
bit using this register while the endpoint is enabled for DMA operation.
USBDMARClr is a write only register.
The USBDMARClr bit allocation is identical to the USBDMARSt register
Writing one to a bit in this register sets the corresponding bit in the USBDMARSt register.
Writing zero has no effect.
This register allows software to raise a DMA request. This can be useful when switching
from Slave to DMA mode of operation for an endpoint: if a packet to be processed in DMA
mode arrives before the corresponding bit of USBEpIntEn is cleared, the DMA request is
not raised by hardware. Software can then use this register to manually start the DMA
transfer.
EP14
EP6
14
6
Control endpoint OUT (DMA cannot be enabled for this endpoint and EP0
Control endpoint IN (DMA cannot be enabled for this endpoint and EP1 bit
Control endpoint OUT (DMA cannot be enabled for this endpoint and the
Control endpoint IN (DMA cannot be enabled for this endpoint and the EP1
bit must be 0).
Description
bit must be 0).
must be 0).
Endpoint xx (2 ≤ xx ≤ 31) DMA request.
DMA not requested by endpoint xx.
DMA requested by endpoint xx.
Description
EP0 bit must be 0).
Clear the endpoint xx (2 ≤ xx ≤ 31) DMA request.
No effect.
Clear the corresponding bit in USBDMARSt.
EP13
EP5
13
5
Rev. 04 — 26 August 2009
EP12
EP4
12
4
Chapter 13: LPC24XX USB device controller
EP11
EP3
11
3
EP10
EP2
10
2
EP9
EP1
UM10237
9
1
© NXP B.V. 2009. All rights reserved.
(Table
Reset value
0
0
0
Reset value
0
0
0
13–328).
354 of 792
EP8
EP0
8
0

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