LPC2468FBD208,551 NXP Semiconductors, LPC2468FBD208,551 Datasheet - Page 289

• Manufacturer Part Number: LPC2468FBD208,551
• Description: IC ARM7 MCU FLASH 512K 208-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FBD208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4261; 935282457551; LPC2468FBD208-S

NXP Semiconductors
UM10237_4
User manual
Table 12–246
word corresponding to the endianness and bpp combinations. For each of the three
supported data formats, the required data for each panel display pixel must be extracted
from the data word.
Table 246. FIFO bits for Little-endian Byte, Little-endian Pixel order
FIFO bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
through
1 bpp
p31
p30
p29
p28
p27
p26
p25
p24
p23
p22
p21
p20
p19
p18
p17
p16
p15
p14
p13
p12
p10
p11
p9
p8
p7
p6
p5
p4
p3
p2
p1
p0
Rev. 04 — 26 August 2009
Table 12–248
2 bpp
p15
p14
p13
p12
p10
p11
p9
p8
p7
p6
p5
p4
p3
p2
p1
p0
show the structure of the data in each DMA FIFO
4 bpp
p7
p6
p5
p4
p3
p2
p1
p0
Chapter 12: LPC24XX LCD controller
8 bpp
p3
p2
p1
p0
16 bpp
p1
p0
UM10237
© NXP B.V. 2009. All rights reserved.
24 bpp
289 of 792
p0