LPC2468FBD208,551 NXP Semiconductors, LPC2468FBD208,551 Datasheet - Page 408

• Manufacturer Part Number: LPC2468FBD208,551
• Description: IC ARM7 MCU FLASH 512K 208-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FBD208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4261; 935282457551; LPC2468FBD208-S

NXP Semiconductors
Table 373. I2C Control register (I2C_CTL - address 0xFFE0 C308) bit description
UM10237_4
User manual
Bit
0
1
2
Symbol
TDIE
AFIE
NAIE
7.13 I2C Control Register (I2C_CTL - 0xFFE0 C308)
Value Description
0
1
0
1
0
1
Table 372. I2C status register (I2C_STS - address 0xFFE0 C304) bit description
The I2C_CTL register is used to enable interrupts and reset the I
Enabled interrupts cause the USB_I2C_INT interrupt output line to be asserted when set.
Transmit Done Interrupt Enable. This enables the TDI interrupt signalling that this I
issued a STOP condition.
Disable the TDI interrupt.
Enable the TDI interrupt.
Transmitter Arbitration Failure Interrupt Enable. This enables the AFI interrupt which is
asserted during transmission when trying to set SDA high, but the bus is driven low by
another device.
Disable the AFI.
Enable the AFI.
Transmitter No Acknowledge Interrupt Enable. This enables the NAI interrupt signalling
that transmitted byte was not acknowledged.
Disable the NAI.
Enable the NAI.
Bit
8
9
10
11
31:12 -
Symbol Value Description
RFF
RFE
TFF
TFE
0
1
0
1
0
1
0
1
NA
Rev. 04 — 26 August 2009
Receive FIFO Full (RFF). This bit is set when the RX FIFO is full
and cannot accept any more data. It is cleared when the RX
FIFO is not full. If a byte arrives when the Receive FIFO is full,
the SCL is held low until the CPU reads the RX FIFO and makes
room for it.
RX FIFO is not full
RX FIFO is full
Receive FIFO Empty. RFE is set when the RX FIFO is empty
and is cleared when the RX FIFO contains valid data.
RX FIFO contains data.
RX FIFO is empty
Transmit FIFO Full. TFF is set when the TX FIFO is full and is
cleared when the TX FIFO is not full.
TX FIFO is not full.
TX FIFO is full
Transmit FIFO Empty. TFE is set when the TX FIFO is empty
and is cleared when the TX FIFO contains valid data.
TX FIFO contains valid data.
TX FIFO is empty
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Chapter 15: LPC24XX USB OTG controller
2
C state machine.
UM10237
© NXP B.V. 2009. All rights reserved.
2
C
408 of 792
Reset
Value
0
1
0
1
NA
Reset
Value
0
0
0