LPC2468FBD208,551 NXP Semiconductors, LPC2468FBD208,551 Datasheet - Page 200

• Manufacturer Part Number: LPC2468FBD208,551
• Description: IC ARM7 MCU FLASH 512K 208-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FBD208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4261; 935282457551; LPC2468FBD208-S

NXP Semiconductors
UM10237_4
User manual
6.2 GPIO port output Set register IOSET and FIOSET(IO[0/1]SET -
Aside from the 32-bit long and word only accessible FIODIR register, every fast GPIO port
can also be controlled via several byte and half-word accessible registers listed in
Table
additional registers allow easier and faster access to the physical port pins.
Table 163. Fast GPIO port Direction control byte and half-word accessible register
0xE002 80[0/1]4 and FIO[0/1/2/3/4]SET - 0x3FFF C0[1/3/5/7/9]8)
This register is used to produce a HIGH level output at the port pins configured as GPIO in
an OUTPUT mode. Writing 1 produces a HIGH level at the corresponding port pins.
Writing 0 has no effect. If any pin is configured as an input or a secondary function, writing
1 to the corresponding bit in the IOSET has no effect.
Reading the IOSET register returns the value of this register, as determined by previous
writes to IOSET and IOCLR (or IOPIN as noted above). This value does not reflect the
effect of any outside world influence on the I/O pins.
Generic
Register
name
FIOxDIR0
FIOxDIR1
FIO0DIR2
FIOxDIR3
FIOxDIRL
FIOxDIRU Fast GPIO Port x Direction
10–163, too. Next to providing the same functions as the FIODIR register, these
description
Description
Fast GPIO Port x Direction
control register 0. Bit 0 in
FIOxDIR0 register corresponds
to pin Px.0 ... bit 7 to pin Px.7.
Fast GPIO Port x Direction
control register 1. Bit 0 in
FIOxDIR1 register corresponds
to pin Px.8 ... bit 7 to pin Px.15.
Fast GPIO Port x Direction
control register 2. Bit 0 in
FIOxDIR2 register corresponds
to pin Px.16 ... bit 7 to pin
Px.23.
Fast GPIO Port x Direction
control register 3. Bit 0 in
FIOxDIR3 register corresponds
to pin Px.24 ... bit 7 to pin
Px.31.
Fast GPIO Port x Direction
control Lower half-word
register. Bit 0 in FIOxDIRL
register corresponds to pin
Px.0 ... bit 15 to pin Px.15.
control Upper half-word
register. Bit 0 in FIOxDIRU
register corresponds to Px.16
... bit 15 to Px.31.
Rev. 04 — 26 August 2009
Chapter 10: LPC24XX General Purpose Input/Output (GPIO)
Register
length (bits)
& access
8 (byte)
R/W
8 (byte)
R/W
8 (byte)
R/W
8 (byte)
R/W
16 (half-word)
R/W
16 (half-word)
R/W
Reset
value
0x00
0x00
0x00
0x00
0x0000 FIO0DIRL - 0x3FFF C000
0x0000 FIO0DIRU - 0x3FFF C002
PORTn Register
Address & Name
FIO0DIR0 - 0x3FFF C000
FIO1DIR0 - 0x3FFF C020
FIO2DIR0 - 0x3FFF C040
FIO3DIR0 - 0x3FFF C060
FIO4DIR0 - 0x3FFF C080
FIO0DIR1 - 0x3FFF C001
FIO1DIR1 - 0x3FFF C021
FIO2DIR1 - 0x3FFF C041
FIO3DIR1 - 0x3FFF C061
FIO4DIR1 - 0x3FFF C081
FIO0DIR2 - 0x3FFF C002
FIO1DIR2 - 0x3FFF C022
FIO2DIR2 - 0x3FFF C042
FIO3DIR2 - 0x3FFF C062
FIO4DIR2 - 0x3FFF C082
FIO0DIR3 - 0x3FFF C003
FIO1DIR3 - 0x3FFF C023
FIO2DIR3 - 0x3FFF C043
FIO3DIR3 - 0x3FFF C063
FIO4DIR3 - 0x3FFF C083
FIO1DIRL - 0x3FFF C020
FIO2DIRL - 0x3FFF C040
FIO3DIRL - 0x3FFF C060
FIO4DIRL - 0x3FFF C080
FIO1DIRU - 0x3FFF C022
FIO2DIRU - 0x3FFF C042
FIO3DIRU - 0x3FFF C062
FIO4DIRU - 0x3FFF C082
UM10237
© NXP B.V. 2009. All rights reserved.
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