LPC2468FBD208,551 NXP Semiconductors, LPC2468FBD208,551 Datasheet - Page 338

• Manufacturer Part Number: LPC2468FBD208,551
• Description: IC ARM7 MCU FLASH 512K 208-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FBD208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4261; 935282457551; LPC2468FBD208-S

NXP Semiconductors
UM10237_4
User manual
9.2.1 USB Clock Control register (USBClkCtrl - 0xFFE0 CFF4)
9.2.2 USB Clock Status register (USBClkSt - 0xFFE0 CFF8)
9.2 Clock control registers
Table 294. USB Port Select register (USBPortSel - address 0xFFE0 C110) bit description
This register controls the clocking of the USB Device Controller. Whenever software
wants to access the device controller registers, both DEV_CLK_EN and AHB_CLK_EN
must be set. The PORTSEL_CLK_EN bit need only be set when accessing the
USBPortSel register.
The software does not have to repeat this exercise for every register access, provided that
the corresponding USBClkCtrl bits are already set. Note that this register is functional only
when the PCUSB bit of PCONP is set; when PCUSB is cleared, all clocks to the device
controller are disabled irrespective of the contents of this register. USBClkCtrl is a
read/write register.
Table 295. USBClkCtrl register (USBClkCtrl - address 0xFFE0 CFF4) bit description
This register holds the clock availability status. The bits of this register are ORed together
to form the USB_NEED_CLK signal. When enabling a clock via USBClkCtrl, software
should poll the corresponding bit in USBClkSt. If it is set, then software can go ahead with
the register access. Software does not have to repeat this exercise for every access,
provided that the USBClkCtrl bits are not disturbed. USBClkSt is a read only register.
Bit
1:0
31:2
Bit
0
1
2
3
4
31:5
Symbol
PORTSEL
-
Symbol
-
DEV_CLK_EN
-
PORTSEL_CLK_EN
AHB_CLK_EN
-
Value
0x0
0x3
-
Rev. 04 — 26 August 2009
Description
The USB device controller signals are mapped to
the U1 port: USB_CONNECT1, USB_UP_LED1,
USB_D+1, USB_D − 1.
The USB device controller signals are mapped to
the U2 port:USB_CONNECT2, USB_UP_LED2,
USB_D+2, USB_D − 2
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
Description
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
Device clock enable. Enables the usbclk input to the
device controller
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
Port select register clock enable.
AHB clock enable
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
Chapter 13: LPC24XX USB device controller
UM10237
© NXP B.V. 2009. All rights reserved.
Reset value
0
NA
338 of 792
Reset
value
NA
0
NA
NA
0
NA