LPC2468FBD208,551 NXP Semiconductors, LPC2468FBD208,551 Datasheet - Page 745

IC ARM7 MCU FLASH 512K 208-LQFP

LPC2468FBD208,551

Manufacturer Part Number
LPC2468FBD208,551
Description
IC ARM7 MCU FLASH 512K 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2468FBD208,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4261
935282457551
LPC2468FBD208-S

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NXP Semiconductors
4. Pin description
5. Register description
UM10237_4
User manual
Table 679. ETM configuration
[1]
Table 680. ETM pin description
The ETM contains 29 registers as shown in
detail in the ARM IHI 0014E document published by ARM Limited.
Resource number/type
External Inputs
External Outputs
FIFOFULL Present
FIFO depth
Trace Packet Width
Pin Name
TRACECLK
PIPESTAT[2:0]
TRACESYNC
TRACEPKT[3:0] Output Trace Packet. The trace packet signals are used to output packaged
EXTIN[0]
For details refer to ARM documentation "Embedded Trace Macrocell Specification (ARM IHI 0014E)".
Type
Output Trace Clock. The trace clock signal provides the clock for the trace
Output Pipe Line status. The pipeline status signals provide a cycle-by-cycle
Output Trace synchronization. The trace sync signal is used to indicate the
Input
Rev. 04 — 26 August 2009
Description
port. PIPESTAT[2:0], TRACESYNC, and TRACEPKT[3:0] signals are
referenced to the rising edge of the trace clock. This clock is not
generated by the ETM block. It is to be derived from the system clock.
The clock should be balanced to provide sufficient hold time for the
trace data signals. Half rate clocking mode is supported. Trace data
signals should be shifted by a clock phase from TRACECLK. Refer to
Figure 3.14 page 3.26 and figure 3.15 page 3.27 in "ETM7 Technical
Reference Manual" (ARM DDI 0158B) , for example circuits that
implements both half-rateclocking and shifting of the trace data with
respect to the clock. For TRACECLK timings refer to section 5.2 on
page 5-13 in "Embedded Trace Macrocell Specification" (ARM IHI
0014E) .
indication of what is happening in the execution stage of the processor
pipeline.
first packet of a group of trace packets and is asserted HIGH only for
the first packet of any branch address.
address and data information related to the pipeline status. All packets
are eight bits in length. A packet is output over two cycles. In the first
cycle, Packet[3:0] is output and in the second cycle, Packet[7:4] is
output.
External Trigger Input
Chapter 34: LPC24XX Embedded Trace Module (ETM)
Table 34–681
Small
2
0
Yes (Not wired)
10 bytes
4/8
[1]
below. They are described in
UM10237
© NXP B.V. 2009. All rights reserved.
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