LPC2468FBD208,551 NXP Semiconductors, LPC2468FBD208,551 Datasheet - Page 244

IC ARM7 MCU FLASH 512K 208-LQFP

LPC2468FBD208,551

Manufacturer Part Number
LPC2468FBD208,551
Description
IC ARM7 MCU FLASH 512K 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2468FBD208,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4261
935282457551
LPC2468FBD208-S

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NXP Semiconductors
UM10237_4
User manual
The StatusInfo word contains flags returned by the MAC and flags generated by the
receive datapath reflecting the status of the reception.
in the StatusInfo word.
Table 237. Receive status information word
[1]
For multi-fragment frames, the value of the AlignmentError, RangeError, LengthError,
SymbolError and CRCError bits in all but the last fragment in the frame will be 0; likewise
the value of the FailFilter, Multicast, Broadcast, VLAN and ControlFrame bits is undefined.
The status of the last fragment in the frame will copy the value for these bits from the
MAC. All fragment statuses will have valid LastFrag, RxSize, Error, Overrun and
NoDescriptor bits.
Bit
10:0
17:11 -
18
19
20
21
22
23
24
25
26
27
28
29
30
31
The EMAC doesn't distinguish the frame type and frame length, so, e.g. when the IP(0x8000) or
ARP(0x0806) packets are received, it compares the frame type with the max length and gives the "Range"
error. In fact, this bit is not an error indication, but simply a statement by the chip regarding the status of the
received frame.
Symbol
RxSize
ControlFrame
VLAN
FailFilter
Multicast
Broadcast
CRCError
SymbolError
LengthError
RangeError
AlignmentError An alignment error is flagged when dribble bits are detected and also a
Overrun
NoDescriptor
LastFlag
Error
[1]
Description
The size in bytes of the actual data transferred into one fragment buffer. In
other words, this is the size of the frame or fragment as actually written by
the DMA manager for one descriptor. This may be different from the Size
bits of the Control field in the descriptor that indicate the size of the buffer
allocated by the device driver. Size is -1 encoded e.g. if the buffer has
8 bytes the RxSize value will be 7.
Unused
Indicates this is a control frame for flow control, either a pause frame or a
frame with an unsupported opcode.
Indicates a VLAN frame.
Indicates this frame has failed the Rx filter. These frames will not normally
pass to memory. But due to the limitation of the size of the buffer, part of
this frame may already be passed to memory. Once the frame is found to
have failed the Rx filter, the remainder of the frame will be discarded
without being passed to the memory. However, if the PassRxFilter bit in
the Command register is set, the whole frame will be passed to memory.
Set when a multicast frame is received.
Set when a broadcast frame is received.
The received frame had a CRC error.
The PHY reports a bit error over the MII during reception.
The frame length field value in the frame specifies a valid length, but does
not match the actual data length.
The received packet exceeds the maximum packet size.
CRC error is detected. This is in accordance with IEEE std. 802.3/clause
4.3.2.
Receive overrun. The adapter can not accept the data stream.
No new Rx descriptor is available and the frame is too long for the buffer
size in the current receive descriptor.
When set to 1, indicates this descriptor is for the last fragment of a frame.
If the frame consists of a single fragment, this bit is also set to 1.
An error occurred during reception of this frame. This is a logical OR of
AlignmentError, RangeError, LengthError, SymbolError, CRCError, and
Overrun.
Rev. 04 — 26 August 2009
Table 11–237
Chapter 11: LPC24XX Ethernet
lists the bit definitions
UM10237
© NXP B.V. 2009. All rights reserved.
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