LPC2468FBD208,551 NXP Semiconductors, LPC2468FBD208,551 Datasheet - Page 229

• Manufacturer Part Number: LPC2468FBD208,551
• Description: IC ARM7 MCU FLASH 512K 208-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FBD208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4261; 935282457551; LPC2468FBD208-S

NXP Semiconductors
UM10237_4
User manual
7.2.2 Status Register (Status - 0xFFE0 0104)
7.2.3 Receive Descriptor Base Address Register (RxDescriptor - 0xFFE0 0108)
Table 206. Command register (Command - address 0xFFE0 0100) bit description
All bits can be written and read. The Tx/RxReset bits are write only, reading will return a 0.
The Status register (Status) is a Read Only register with an address of 0xFFE0 0104. Its
bit definition is shown in
Table 207. Status register (Status - address 0xFFE0 0104) bit description
The values represent the status of the two channels/datapaths. When the status is 1, the
channel is active, meaning:
The status transitions from active to inactive if the channel is disabled by a software reset
of the Rx/TxEnable bit in the Command register and the channel has committed the status
and data of the current frame to memory. The status also transitions to inactive if the
transmit queue is empty or if the receive queue is full and status and data have been
committed to memory.
The Receive Descriptor base address register (RxDescriptor) has an address of
0xFFE0 0108. Its bit definition is shown in
Table 208. Receive Descriptor Base Address register (RxDescriptor - address 0xFFE0 0108)
Bit
8
9
10
31:11
Bit
0
1
31:2
Bit
1:0
31:2
•
•
•
It is enabled and the Rx/TxEnable bit is set in the Command register or it just got
disabled while still transmitting or receiving a frame.
Also, for the transmit channel, the transmit queue is not empty
i.e. ProduceIndex != ConsumeIndex.
Also, for the receive channel, the receive queue is not full
i.e. ProduceIndex != ConsumeIndex - 1.
Symbol
-
RxDescriptor
Symbol
RxStatus If 1, the receive channel is active. If 0, the receive channel is inactive.
TxStatus If 1, the transmit channel is active. If 0, the transmit channel is inactive. 0
-
Symbol
TxFlowControl
RMII
FullDuplex
-
bit description
Function
Unused
Rev. 04 — 26 August 2009
Function
Fixed to ’00’
MSBs of receive descriptor base address.
Table
Function
Enable IEEE 802.3 / clause 31 flow control sending pause
frames in full duplex and continuous preamble in half duplex.
When set to ’1’, RMII mode is selected; if ’0’, MII mode is
selected.
When set to ’1’, indicates full duplex operation.
Unused
11–207.
Table
11–208.
Chapter 11: LPC24XX Ethernet
UM10237
© NXP B.V. 2009. All rights reserved.
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Reset
value
-
0x0
Reset
value
0
0
0
0x0
Reset
value
0
0x0