LPC2468FBD208,551 NXP Semiconductors, LPC2468FBD208,551 Datasheet - Page 220

IC ARM7 MCU FLASH 512K 208-LQFP

LPC2468FBD208,551

Manufacturer Part Number
LPC2468FBD208,551
Description
IC ARM7 MCU FLASH 512K 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2468FBD208,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4261
935282457551
LPC2468FBD208-S

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NXP Semiconductors
UM10237_4
User manual
7.1 Ethernet MAC register definitions
Table 186. Summary of Ethernet registers
The third column in the table lists the accessibility of the register: read-only, write-only,
read/write.
All AHB register write transactions except for accesses to the interrupt registers are
posted i.e. the AHB transaction will complete before write data is actually committed to the
register. Accesses to the interrupt registers will only be completed by accepting the write
data when the data has been committed to the register.
This section defines the bits in the individual registers of the Ethernet block register map.
Symbol
RSV
-
FlowControlCounter
FlowControlStatus
-
Rx filter registers
RxFliterCtrl
RxFilterWoLStatus
RxFilterWoLClear
-
HashFilterL
HashFilterH
-
Module control registers
IntStatus
IntEnable
IntClear
IntSet
-
PowerDown
-
Address
0xFFE0 0160
0xFFE0 0164 to
0xFFE0 016C
0xFFE0 0170
0xFFE0 0174
0xFFE0 0178 to
0xFFE0 01FC
0xFFE0 0200
0xFFE0 0204
0xFFE0 0208
0xFFE0 020C
0xFFE0 0210
0xFFE0 0218 to
0xFFE0 0FDC
0xFFE0 0FE0
0xFFE0 0FE4
0xFFE0 0FE8
0xFFE0 0FEC
0xFFE0 0FF0
0xFFE0 0FF4
0xFFE0 0FF8
0xFFE0 0214
Rev. 04 — 26 August 2009
R/W Description
RO
-
R/W Flow control counter register.
RO
-
-
-
RO
R/W Interrupt enable register.
WO Interrupt clear register.
WO Interrupt set register.
-
R/W Power-down register.
-
Receive status vector register.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit
is not defined.
Flow control status register.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit
is not defined.
Receive filter control register.
Receive filter WoL status register.
Receive filter WoL clear register.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit
is not defined.
Hash filter table LSBs register.
Hash filter table MSBs register.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit
is not defined.
Interrupt status register.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit
is not defined.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit
is not defined.
Chapter 11: LPC24XX Ethernet
UM10237
© NXP B.V. 2009. All rights reserved.
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