MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 310

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

External Interface Module (EIM)
Note the following characteristics of a basic read:
States are described in
17.5.4 Write Cycle
During a write cycle, the MCF5271 sends data to the memory or to a peripheral device. The write
cycle flowchart is shown in
17-8
A[31:0], TSIZ[1:0]
• In S3, data is made available by the external device on the falling edge of CLKOUT and is
• In S4, the external device can stop driving data after the rising edge of CLKOUT. However
• For a read cycle, the external device stops driving data between S4 and S5.
CSn, BSn, OE
sampled on the rising edge of CLKOUT with TA asserted.
data could be driven up to S5.
CLKOUT
D[31:0]
R/W
TIP
TS
TA
Table
Figure
17-4.
Figure 17-6. Basic Read Bus Cycle
MCF5271 Reference Manual, Rev. 2
S0
17-7.
S1
S2
S3
Read
S4
S5
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