MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 409

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MCF5270CAB100

Manufacturer Part Number
MCF5270CAB100
Description
MCU V2 COLDFIRE 64K SRAM 160-QFP
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5270CAB100

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5270CAB100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 22
DMA Timers (DTIM0–DTIM3)
22.1
This chapter describes the configuration and operation of the four Direct Memory Access (DMA)
timer modules (DTIM0, DTIM1, DTIM2, and DTIM3). These 32-bit timers provide input capture
and reference compare capabilities with optional signaling of events using interrupts or triggers.
Additionally, programming examples are included.
22.1.1 Overview
Each DMA timer module has a separate register set for configuration and control. The timers can
be configured to operate from the system clock or from an external clocking source using the
DTINn signal. If the system clock is selected, it can be divided by 16 or 1. The selected clock
source is routed to an 8-bit programmable prescaler that clocks the actual DMA timer counter
register (DTCNn). Using the DTMRn, DTXMRn, DTCRn, and DTRRn registers, the DMA timer
may be configured to assert an output signal, generate an interrupt, or initiate a DMA transfer on
a particular event.
Figure 22-1
Freescale Semiconductor
Introduction
is a block diagram of one of the four identical timer modules.
The designation “n” is used throughout this section to refer to registers
or signals associated with one of the four identical timer
modules—DTIM0, DTIM1, DTIM2, or DTIM3.
The GPIO module must be configured to enable the peripheral
function of the appropriate pins (refer to
Purpose I/O
Module”) prior to configuring the DMA Timers.
MCF5271 Reference Manual, Rev. 2
NOTE
NOTE
Chapter 12, “General
22-1

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