MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 351

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

RMON counters are included which cover the Ethernet Statistics counters defined in RFC 1757.
In addition to the counters defined in the Ethernet Statistics group, a counter is included to count
truncated frames as the FEC only supports frame lengths up to 2032 bytes. The RMON counters
are implemented independently for transmit and receive to insure accurate network statistics when
operating in full duplex mode.
IEEE counters are included which support the Mandatory and Recommended counter packages
defined in Section 5 of ANSI/IEEE Std. 802.3 (1998 edition). The IEEE Basic Package objects are
supported by the FEC but do not require counters in the MIB block. In addition, some of the
recommended package objects which are supported do not require MIB counters. Counters for
transmit and receive full duplex flow control frames are included as well.
Freescale Semiconductor
IPSBAR Offset
0x120C
0x121C
0x122C
0x123C
0x124C
0x125C
0x1200
0x1204
0x1208
0x1210
0x1214
0x1218
0x1220
0x1224
0x1228
0x1230
0x1234
0x1238
0x1240
0x1244
0x1248
0x1250
0x1254
0x1258
0x1260
Table 19-3. MIB Counters Memory Map
RMON_T_P1024TO2047
RMON_T_P512TO1023
RMON_T_CRC_ALIGN
RMON_T_UNDERSIZE
RMON_T_P128TO255
RMON_T_P_GTE2048
RMON_T_P256TO511
RMON_T_OVERSIZE
RMON_T_P65TO127
IEEE_T_FRAME_OK
RMON_T_PACKETS
RMON_T_MC_PKT
RMON_T_OCTETS
RMON_T_BC_PKT
RMON_T_DROP
RMON_T_FRAG
IEEE_T_EXCOL
RMON_T_COL
IEEE_T_DROP
IEEE_T_MCOL
RMON_T_JAB
RMON_T_P64
IEEE_T_1COL
IEEE_T_LCOL
IEEE_T_DEF
Mnemonic
MCF5271 Reference Manual, Rev. 2
RMON Tx Packets > MAX_FL bytes, good crc
Frames Transmitted with Excessive Collisions
RMON Tx Packets > MAX_FL bytes, bad crc
Frames Transmitted with Multiple Collisions
Frames Transmitted with Single Collision
Frames Transmitted after Deferral Delay
RMON Tx Packets < 64 bytes, good crc
Frames Transmitted with Late Collision
RMON Tx Packets < 64 bytes, bad crc
Count of frames not counted correctly
Count of frames not counted correctly
RMON Tx Packets w CRC/Align error
RMON Tx 1024 to 2047 byte packets
RMON Tx 512 to 1023 byte packets
RMON Tx 128 to 255 byte packets
RMON Tx 256 to 511 byte packets
RMON Tx packets w > 2048 bytes
RMON Tx 65 to 127 byte packets
RMON Tx Broadcast Packets
RMON Tx Multicast Packets
RMON Tx 64 byte packets
RMON Tx collision count
Frames Transmitted OK
RMON Tx packet count
RMON Tx Octets
Description
Memory Map/Register Definition
19-7