MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 500

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Message Digest Hardware Accelerator (MDHA)
26.2.4
The MDSR stores the current status of the MDHA. This register is used to debug errors and to give
a view into the workings of the MDHA’s internal engines.
26-8
Address
Reset
Reset
Field
31–24
23–16
31–4
Bits
Bits
W
W
3
2
1
0
R
31
15
0
0
0
MDHA Status Register (MDSR)
APD
Name
Name
SWR
30
14
0
0
0
GO
IFL
—
CI
RI
—
29
13
0
0
0
Reserved
Go. Indicates that all data has been loaded into the input FIFOand the module should
complete all processing. This bit is self clearing.
0 Do not complete all processing.
1 Finish all processing.
Clear IRQ. Clears errors in the MDISR register and deasserts any interrupt requests from
the MDHA module. This bit is self clearing.
0 Do not clear interrupts & errors.
1 Clear interrupts & errors.
Re-initialize. Re-initializes memory and clears all registers except the MDESM and MDCR.
0 No re-initialization
1 Re-initialize the MDHA module
Software reset. Resets all registers and re-initialize memory of the MDHA. Functionally
equivalent to hardware reset. This bit is self clearing.
0 No reset
1 Software reset
Reserved, should be cleared.
Input FIFO level. Read-only. The current number of longwords that are in the Input FIFO.
IFL will range from 0–16 longwords (0x00-0x10).
Figure 26-5. MDHA Status Register (MDSR)
Table 26-5. MDCMR Field Descriptions
28
12
0
0
0
0
Table 26-6. MDSR Field Descriptions
27
11
0
0
0
0
MCF5271 Reference Manual, Rev. 2
26
10
0
0
1
FS
25
IPSBAR + 0x19_000C
0
0
9
0
24
0
0
0
8
GNW HSH
Bit Description
Description
23
0
0
7
22
0
0
6
21
0
0
0
5
BUSY RD ERR DONE INT
20
0
0
4
IFL
19
0
1
3
Freescale Semiconductor
18
0
2
0
17
0
1
0
16
0
0
0