MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 316

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

External Interface Module (EIM)
17.5.7.3 Line Write Bus Cycles
Figure 17-16
with data driven one clock after TS. The next pipelined burst data is driven a cycle after the write
data is registered (on the rising edge of S6). Each subsequent burst takes a single cycle. Note that
as with the line read example in
This example shows the behavior of the address lines for both internal and external termination.
Note that when external termination is used, the address lines change with TSIZ[1:0].
17-14
External Termination
CSn, BSn, OE
Internal Termination
Figure 17-15. Line Read Burst-Inhibited, Fast Termination, External Termination
CLKOUT
TSIZ[1:0]
CSn, OE, BSn
A[31:0]
D[31:0]
Figure 17-16. Line Write Burst (2-1-1-1), Internal/External Termination
R/W
TSIZ[1:0]
TIP
CLKOUT
R/W, TIP
TS
TA
shows a line access write with zero wait states. It begins like a basic write bus cycle
D[31:0]
A[31:0]
A[31:0]
TS
TA
S0
S1
A[3:2] = 00
S2
S0
Basic
Figure
Line
MCF5271 Reference Manual, Rev. 2
S3
Read
S1
S4
17-12, CSn remain asserted throughout the burst transfer.
S2
S5
S0
S3
A[3:2] = 01
Write
S1
Fast
Read
S4
S4
S5
S5
S0
S6
A[3:2] = 10
Longword
Write
S1
Fast
Read
S7
S4
S8
S5
Write
S0
S9
A[3:2] = 11
S1
Fast
Freescale Semiconductor
S10
Read
S4
Write
S11
S5
S6
S7