MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 332

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Synchronous DRAM Controller Module
Figure 18-5
18.3.4.2 Interfacing Example
The tables in the previous section can be used to configure the interface in the following example.
To interface one 2M x 32-bit x 4 bank SDRAM component (8 columns) to the MCF5271, the
connections shown in
18.3.4.3 Burst Page Mode
SDRAM can efficiently provide data when an SDRAM page is opened. As soon as SD_SCAS is
issued, the SDRAM accepts a new address and asserts SD_SCAS every CLKOUT for as long as
accesses occur in that page. In burst page mode, there are multiple read or write operations for
every
18-14
Table 18-23. MCF5271 to SDRAM Interface (32-Bit Port, 12-Column Address Lines)
ACTV
SDRAM
Pins
MCF5271
Pins
shows the SDRAM connections for port sizes of 32, 16 or 8 bits.
command in the SDRAM if the requested transfer size exceeds the port size of the
Figure 18-5. SDRAM connections for port sizes of 32, 16, or 8 bits
A15
MCF5271
Pins
Row
Column
SDRAM
Pins
A0
Byte Enable
Table 18-24
32-Bit Port
16-Bit Port
Processor
8-Bit Port
Data Bus
Table 18-24. SDRAM Hardware Connections
A14
External
Memory
Memory
Memory
A1
A15 A14 A13 A12 A11 A10
15
A0
A13
2
A2
A1
14
3
MCF5271 Reference Manual, Rev. 2
A12
A3
D[31:24]
would be used.
Byte 0
Byte 0
Byte 2
BS3
Byte 0
Byte 1
Byte 2
Byte 3
A2
13
4
A11
A4
A3
12
5
D[23:16]
A10
Byte 1
Byte 1
Byte 3
A5
BS2
A4
11
6
indeterminate values
A6
A9
Driven with
A5
10
7
indeterminate values
D[15:8]
Byte 2
BS1
A17
A7
Driven with
A9
A6
9
8
A18
A8
A17 A19 A21 A23
A7
17
16
Byte 3
D[7:0]
BS0
A19
A9
A8
19
18
A10 = CMD BA0 BA1
A9
21
20
A20
A10
23
22
Freescale Semiconductor
A21
A22