MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 516

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Random Number Generator (RNG)
Each time the RNGER is written, the value is used to update the internal state of the RNG. The
update is performed in such a way that the entropy in the RNG’s internal state is preserved. Use of
the RNGER can increase the entropy but never decrease it.
27.2.4 RNG Output FIFO (RNGOUT)
The RNGOUT provides temporary storage for random data generated by the RNG. As long as the
FIFO is not empty, a read of this address will return 32 bits of random data. If the FIFO is read
when it is empty, Error Interrupt, FIFO Underflow and Last Read bits in the RNGSR will be set.
If the interrupt is enabled in the RNGCR an interrupt will be triggered to the interrupt controller.
The RNGSR[OFL], described in
to monitor how many 32-bit words are currently resident in the FIFO. A new random word is
pushed into the FIFO every 256 clock cycles (as long as the FIFO is not full). It is very important
that the user polls RNGSR[OFL] to make sure random values are present before reading from the
FIFO.
27-4
Address
Address
Reset
Reset
Reset
Reset
W
W
W
W
R
R
R
R
31
15
31
15
0
0
0
0
0
0
30
14
30
14
0
0
0
0
0
0
Figure 27-3. RNG Entropy Register (RNGER)
Figure 27-4. RNG Output FIFO (RNGOUT)
29
13
29
13
0
0
0
0
0
0
28
12
28
12
0
0
0
0
0
0
Section 27.2.2, “RNG Status Register
MCF5271 Reference Manual, Rev. 2
27
27
11
11
0
0
0
0
0
0
26
10
26
10
0
0
0
0
0
0
IPSBAR + 0x1A_000C
IPSBAR + 0x1A_0008
25
25
0
0
0
0
0
0
9
9
Random Output
Random Output
24
24
0
0
0
0
0
0
8
8
ENT
ENT
23
23
0
0
0
0
0
0
7
7
22
22
0
0
0
0
0
0
6
6
21
21
0
0
0
0
0
0
5
5
20
20
0
0
0
0
0
0
4
4
(RNGSR),” can be polled
19
19
0
0
0
0
0
0
3
3
18
18
0
0
0
0
0
0
2
2
Freescale Semiconductor
17
17
0
0
0
0
0
0
1
1
16
16
0
0
0
0
0
0
0
0