MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 319

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Chapter 18
Synchronous DRAM Controller Module
18.1
This chapter describes configuration and operation of the synchronous DRAM (SDRAM)
controller. It begins with a general description and brief glossary, and includes a description of
signals involved in DRAM operations. The remainder of the chapter describes the programming
model and signal timing, as well as the command set required for synchronous operations. It also
includes extensive examples that the designer can follow to better understand how to configure the
DRAM controller for synchronous operations.
18.1.1 Block Diagram
The basic components of the SDRAM controller are shown in
Freescale Semiconductor
Introduction
The timing diagrams within this chapter show 32 address lines,
A[31:0]. However, only the lowest 24 address signals are available
externally on the MCF5271 device, A[23:0].
MCF5271 Reference Manual, Rev. 2
NOTE
Figure
18-1.
18-1