MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 537
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MCF5270CAB100
Manufacturer Part Number
MCF5270CAB100
Description
MCU V2 COLDFIRE 64K SRAM 160-QFP
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5270CAB100
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5270CAB100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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28.3.5 Security Assurance Features
The SKHA features simple security assurance features to prevent operation in the presence of
hardware faults and to shield visibility to sensitive data. Further, any user error or internal
hardware fault will cause the internal state machines to enter an idle/error state. In this case, the
SKHA must be reset to resume operation, SKCMR[SWR]. Readable registers may be accessed to
determine the nature of the error.
28.4
28.4.1 General Operation
The intended general operation of the SKHA is as follows for ECB, CBC and CTR modes:
Freescale Semiconductor
1. Reset/initialize.
2. Set algorithm, processing direction, and cipher mode in the SKMR.
3. Write initialization vector/counter to the SKCRn registers, if necessary.
4. Write symmetric key to SKKDRn registers.
5. Set number of bytes in key in the SKKSR.
6. Set the number of bits in the message in the SKDSR.
7. Load the input FIFO with message data.
8. Set the SKCMR[GO] bit.
Initialization/Application Information
Figure 28-17. SKHA Core Block Diagram
Engine
AES
MCF5271 Reference Manual, Rev. 2
128
Input
Mode Control
Key Data
Logic
Output
Engine
DES
64 or 192
Initialization/Application Information
28-19
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