MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 570

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Debug Support
Unassigned command opcodes are reserved by Freescale. All unused command formats within
any revision level perform a
30-20
1
2
3
Read A/D
register
Write A/D
register
Read
memory
location
Write
memory
location
Dump
memory
block
Fill memory
block
Resume
execution
No operation
Read control
register
Write control
register
Read debug
module
register
Write debug
module
register
Command
General command effect and/or requirements on CPU operation:
- Halted. The CPU must be halted to perform this command.
- Steal. Command generates bus cycles that can be interleaved with bus accesses.
- Parallel. Command is executed in parallel with CPU activity.
lword = longword
0x4 is a three-bit field.
RAREG
RDREG
WAREG
WDREG
READ
WRITE
DUMP
FILL
GO
NOP
RCREG
WCREG
RDMREG
WDMREG
Mnemonic
/
/
Read the selected address or data register and
return the results through the serial interface.
Write the data operand to the specified address
or data register.
Read the data at the memory location specified
by the longword address.
Write the operand data to the memory location
specified by the longword address.
Used with
An initial
address of the block and to retrieve the first
result. A
operands.
Used with
initial
address of the block and to supply the first
operand. A
operands.
The pipeline is flushed and refilled before
resuming instruction execution at the current PC.
Perform no operation; may be used as a null
command.
Read the system control register.
Write the operand data to the system control
register.
Read the debug module register.
Write the operand data to the debug module
register.
Table 30-18. BDM Command Summary
NOP
WRITE
DUMP
READ
READ
WRITE
and return the illegal command response.
FILL
is executed to set up the starting
MCF5271 Reference Manual, Rev. 2
is executed to set up the starting
command retrieves subsequent
to dump large blocks of memory.
command writes subsequent
to fill large blocks of memory. An
Description
Parallel
Parallel
Parallel
State
Halted
Halted
Halted
Halted
Halted
Steal
Steal
Steal
Steal
CPU
1
30.5.3.3.10
30.5.3.3.12
30.5.3.3.11
30.5.3.3.1
30.5.3.3.2
30.5.3.3.3
30.5.3.3.4
30.5.3.3.5
30.5.3.3.6
30.5.3.3.7
30.5.3.3.8
30.5.3.3.9
Section
Freescale Semiconductor
0x218 {A/D,
Reg[2:0]}
0x208 {A/D,
Reg[2:0]}
0x1900—byte
0x1940—word
0x1980—lword
0x1800—byte
0x1840—word
0x1880—lword
0x1D00—byte
0x1D40—word
0x1D80—lword
0x1C00—byte
0x1C40—word
0x1C80—lword
0x0C00
0x0000
0x2980
0x2880
0x2D {0x4
DRc[4:0]}
0x2C {0x4
DRc[4:0]}
Command
(Hex)
3
3
2
2
2
2