MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 34

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

About This Book
xxxiv
<ea>y,<ea>x
Instruction
# <vector>
MACSR
#<data>
<label>
DDATA
<shift>
<size>
MASK
Ry,Rx
<xxx>
<list>
<ea>
ACC
CCR
PST
Rm
Rw
PC
SR
Rn
<>
SF
bc
dc
dn
Xi
ic
Any address or data register
Destination register w (used for MAC instructions only)
Any source and destination registers, respectively
Index register i (can be an address or data register: Ai, Di)
MAC accumulator register
Condition code register (lower byte of SR)
MAC status register
MAC mask register
Debug data port
Processor status port
List of registers for MOVEM instruction (example: D3–D0)
Operand data size: byte (B), word (W), longword (L)
Both instruction and data caches
Data cache
Instruction cache
Identifies the 4-bit vector number for trap instructions
identifies an indirect data address referencing memory
identifies an absolute address referencing memory
Signal displacement value, n bits wide (example: d16 is a 16-bit displacement)
Scale factor (x1, x2, x4 for indexed addressing mode, <<1n>> for MAC operations)
MAC registers (ACC, MAC, MASK)
Program counter
Status register
Immediate data following the 16-bit operation word of the instruction
Effective address
Source and destination effective addresses, respectively
Assembly language program label
Shift operation: shift left (<<), shift right (>>)
Table ii. Notational Conventions (Continued)
MCF5271 Reference Manual, Rev. 2
Miscellaneous Operands
Register Names
Port Name
Operand Syntax
Freescale Semiconductor