MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 99

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

4.3
The MAC speeds execution of ColdFire integer multiply instructions (MULS and MULU) and
provides additional functionality for multiply-accumulate operations. By executing MULS and
MULU in the MAC, execution times are minimized and deterministic compared to the 2-bit/cycle
algorithm with early termination that the OEP normally uses if no MAC hardware is present.
The added MAC instructions to the ColdFire ISA provide for the multiplication of two numbers,
followed by the addition or subtraction of the product to or from the value in an accumulator.
Optionally, the product may be shifted left or right by 1 bit before addition or subtraction.
Hardware support for saturation arithmetic can be enabled to minimize software overhead when
dealing with potential overflow conditions. Multiply-accumulate operations support 16- or 32-bit
input operands of the following formats:
The EMAC is optimized for single-cycle, pipelined 32 × 32 multiplications. For word- and
longword-sized integer input operands, the low-order 40 bits of the product are formed and used
with the destination accumulator. For fractional operands, the entire 64-bit product is calculated
and either truncated or rounded to the most-significant 40-bit result using the round-to-nearest
(even) method before it is combined with the destination accumulator.
For all operations, the resulting 40-bit product is extended to a 48-bit value (using sign-extension
for signed integer and fractional operands, zero-fill for unsigned integer operands) before being
combined with the 48-bit destination accumulator.
Figure 4-4
resulting 40-bit product used for accumulation, and 48-bit accumulator formats.
Freescale Semiconductor
• Signed integers
• Unsigned integers
• Signed, fixed-point, fractional numbers
General Operation
and
Figure 4-5
y i ( )
=
k
∑
3
=
0
b k ( )x i k
show relative alignment of input operands, the full 64-bit product, the
(
–
Figure 4-3. Four-Tap FIR Filter
MCF5271 Reference Manual, Rev. 2
)
=
b 0 ( )x i ( )
+
b 1 ( )x i 1
(
–
)
+
b 2 ( )x i 2
(
–
)
+
b 3 ( )x i 3
(
–
)
General Operation
4-3