MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 10

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Paragraph
Number
6.6.5
6.7
6.7.1
6.7.1.1
6.7.1.2
6.7.1.3
6.7.1.4
6.7.1.5
6.7.1.6
6.7.1.7
6.7.1.8
6.7.2
6.7.2.1
6.7.2.2
6.7.2.3
6.7.2.4
6.8
6.9
6.9.1
6.9.2
6.9.3
6.10
6.10.1
6.10.2
6.11
6.11.1
6.11.2
6.11.3
6.11.4
6.12
6.12.1
6.12.2
6.12.3
6.12.4
6.12.4.1
6.12.4.2
6.12.5
6.12.5.1
6.12.5.2
6.12.5.3
6.12.5.4
x
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Interrupt Registers.......................................................................................................... 6-17
Software-Use SPRs (SPRG0–SPRG7 and USPRG0) ................................................... 6-22
Branch Target Buffer (BTB) Registers .......................................................................... 6-23
Hardware Implementation-Dependent Registers........................................................... 6-25
L1 Cache Configuration Registers................................................................................. 6-28
MMU Registers.............................................................................................................. 6-32
Decrementer Auto-Reload Register (DECAR).......................................................... 6-17
Interrupt Registers Defined by the Embedded and Base Categories ......................... 6-17
Additional Interrupt Registers ................................................................................... 6-20
Branch Buffer Entry Address Register (BBEAR) ..................................................... 6-23
Branch Buffer Target Address Register (BBTAR) .................................................... 6-23
Branch Unit Control and Status Register (BUCSR) .................................................. 6-24
Hardware Implementation-Dependent Register 0 (HID0)......................................... 6-25
Hardware Implementation-Dependent Register 1 (HID1)......................................... 6-26
L1 Cache Control and Status Register 0 (L1CSR0) .................................................. 6-28
L1 Cache Control and Status Register 1 (L1CSR1) .................................................. 6-29
L1 Cache Configuration Register 0 (L1CFG0) ......................................................... 6-30
L1 Cache Configuration Register 1 (L1CFG1) ......................................................... 6-31
Process ID Registers (PID0–PID2)............................................................................ 6-32
MMU Control and Status Register 0 (MMUCSR0) .................................................. 6-32
MMU Configuration Register (MMUCFG) .............................................................. 6-32
TLB Configuration Registers (TLBnCFG)................................................................ 6-33
MMU Assist Registers............................................................................................... 6-35
Save/Restore Register 0 (SRR0)............................................................................ 6-17
Save/Restore Register 1 (SRR1)............................................................................ 6-17
Critical Save/Restore Register 0 (CSRR0) ............................................................ 6-17
Critical Save/Restore Register 1 (CSRR1) ............................................................ 6-18
Data Exception Address Register (DEAR)............................................................ 6-18
Interrupt Vector Prefix Register (IVPR) ................................................................ 6-18
Interrupt Vector Offset Registers (IVORn)............................................................ 6-18
Exception Syndrome Register (ESR) .................................................................... 6-19
Machine Check Save/Restore Register 0 (MCSRR0) ........................................... 6-20
Machine Check Save/Restore Register 1 (MCSRR1) ........................................... 6-20
Machine Check Address Register (MCAR/MCARU) .......................................... 6-21
Machine Check Syndrome Register (MCSR)........................................................ 6-21
TLB0 Configuration Register 0 (TLB0CFG) ........................................................ 6-33
TLB1 Configuration Register 1 (TLB1CFG) ........................................................ 6-34
MAS Register 0 (MAS0) ....................................................................................... 6-35
MAS Register 1 (MAS1) ....................................................................................... 6-35
MAS Register 2 (MAS2) ....................................................................................... 6-36
MAS Register 3 (MAS3) ....................................................................................... 6-37
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Freescale Semiconductor
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