MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 156
MPC8533EVTARJ
Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTARJ
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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Quantity
Price
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Quantity:
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Manufacturer:
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Quantity:
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Part Number:
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Manufacturer:
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Quantity:
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Signal Descriptions
Note that the multiplexing of various signals on the MPC8533E is controlled by the PMUXCR register
described in
3-16
Functional Interface
Chapter 19, “Global Utilities.”
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
eTSEC1
eTSEC3
Debug
LBC
PCI
Table 3-3. MPC8533E Reset Configuration Signals
PCI_GNT4
PCI_GNT3
PCI_GNT2
PCI_GNT1
TSEC1_TXD[6:4]
TSEC1_TXD[2]
TSEC1_TXD[1:0]
TSEC1_TX_ER
TSEC3_TXD[6:4]
TSEC3_TXD[2]
TSEC3_TXD[1:0]
TSEC3_TX_ER
LWE_B[0]
LAD[0:31]
LA27
LA[28:31]
LWE[1:3]/LBS[1:3]
LBCTL
LALE
LGPL2/LOE
LGPL0
LGPL1
LGPL3
LGPL5
MSRCID0
MSRCID1
Functional Signal Name
Reset Configuration
cfg_etsec1_prtcl[1:0]
cfg_etsec3_prtcl[1:0]
cfg_tsec1_reduce
cfg_tsec3_reduce
cfg_etsec1_serial
cfg_etsec3_serial
cfg_dram_type[0]
cfg_dram_type[1]
cfg_gpinput[0:31]
cfg_host_agt[0:2]
cfg_io_ports[0:2]
cfg_mem_debug
cfg_rom_loc[0:2]
cfg_boot_seq[0]
cfg_boot_seq[1]
cfg_sys_pll[0:3]
cfg_ddr_debug
cfg_pci_speed
cfg_core_pll[0]
cfg_core_pll[1]
cfg_core_pll[2]
cfg_cpu_boot
cfg_pci_impd
cfg_sec_freq
cfg_pci_arb
cfg_pci_clk
Name
Indeterminate if not
driven (no default)
Must be driven
Must be driven
Must be driven
Must be driven
Freescale Semiconductor
Default
111
111
111
11
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
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