MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 181

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

See
Note that the minimum CCB:SYSCLK ratio for PCI in synchronous mode is 6:1. See
“System PLL
4.4.4.3
The Ethernet blocks operate asynchronously with respect to the rest of the device. These blocks use receive
and transmit clocks supplied by their respective PHY chips, plus a 125-MHz clock input for gigabit
protocols. Data transfers are synchronized to the CCB clock internally.
4.4.4.4
As shown in
facilities. RTC can also be used (optionally) by the MPC8533E programmable interrupt controller (PIC)
global timer facilities. The RTC is separate from the e500 core clock and is intended to support relatively
low frequency timing applications. The RTC frequency range is specified in the MPC8533E Integrated
Processor Hardware Specifications, but the maximum value should not exceed one-quarter of the CCB
Frequency.
Before being distributed to the core time base, RTC is sampled and synchronized with the CCB clock.
The clock source for the core time base is specified by two fields in HID0: time base enable (TBEN), and
select time base clock (SEL_TBCLK). If the time base is enabled, (HID0[TBEN] is set), the clock source
is determined as follows:
The default source of the time base is the CCB clock divided by eight. For more details, see the e500 core
family reference manual.
Section 10.3.2.6, “Timer Control Register
signal to clock the global timers in the PIC unit.
Freescale Semiconductor
•
•
Section 18.1.3.2, “Link
HID0[SEL_TBCLK] = 0, the time base is updated every 8 CCB clocks
HID0[SEL_TBCLK] = 1, the time base is updated on the rising edge of RTC
Figure
Ethernet Clocks
Real Time Clock
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Ratio,” for details of selecting this ratio.
4-7, the real time clock (RTC) input can optionally be used to clock the e500 core timer
Width,” for PCI Express interface width details.
(TCR),” provides additional information on the use of the RTC
Reset, Clocking, and Initialization
Section 4.4.3.1,
4-23