MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 1233

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MPC8533EVTARJ

Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8533EVTARJ

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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21.3
Table 21-6
spaces within offset 0x000–0xFFF are reserved.
In this table and in the register figures and field descriptions, the following access definitions apply:
Freescale Semiconductor
LSSD_MODE
0xE_2000
0xE_2004
L1_TSTCLK
L2_TSTCLK
THERM[0:1]
Memory
TEST_SEL
Offset
Local
Signal
TRST
Reserved fields are always ignored for the purposes of determining access type.
R/W, R, and W (read/write, read only, and write only) indicate that all the non-reserved fields in a
register have the same access type.
w1c indicates that all of the non-reserved fields in a register are cleared by writing ones to them.
Mixed indicates a combination of access types.
Special is used when no other category applies. In this case the register figure and field description
table should be read carefully.
Memory Map/Register Definition
shows the device’s memory-mapped debug and watchpoint registers. Undefined 4-byte address
Table 21-5. JTAG Test and Other Signals—Detailed Signal Descriptions (continued)
WMCR0—Watchpoint monitor control register 0
WMCR1—Watchpoint monitor control register 1
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
I/O
I
I
I
I
I
I
JTAG test reset.
Used for factory test. Refer to the MPC8533E Integrated Processor Hardware Specifications for proper
treatment.
treatment.
treatment.
The actual value for the resistor varies from device to device, but the linear relationship between
temperature and resistance is consistent. See the MPC8533E Integrated Processor Hardware
Specifications for more information on how to accurately measure the junction temperature of a device.
Note that this thermal resistor is intended for engineering development only.
Used for factory test. Should be negated (pulled high) for normal operation.
Used for factory test. Refer to the MPC8533E Integrated Processor Hardware Specifications for proper
Used for factory test. Refer to the MPC8533E Integrated Processor Hardware Specifications for proper
These signals provide access to an internal resistor that has a value that varies linearly with temperature.
Meaning
Timing See IEEE 1149.1 standard for more details.
State
Table 21-6. Debug and Watchpoint Monitor Memory Map
Asserted—Causes asynchronous initialization of the internal JTAG TAP controller. Must be
Negated— Normal operation.
asserted during power-on reset in order to properly initialize the JTAG TAP and for normal
operation of the MPC8533E. An unterminated input appears as a high signal level to the
test logic due to an internal pull-up resistor.
Register
Watchpoint Monitor Registers
Description
Access
R/W
R/W
Debug Features and Watchpoint Facility
0x0000_0000
0x0000_0000
Reset
21.3.1.1/21-10
21.3.1.1/21-10
Section/Page
21-9

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