MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 656
MPC8533EVTARJ
Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTARJ
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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Local Bus Controller
Table 14-23
14-38
1
TRLX
Total cycles when LALE is asserted for one cycle only (OR n [EAD] = 0; OR n [EAD] = 1 and LCRR[EADC] = 01).
Asserting LALE for more than one cycle increases the total cycle count accordingly.
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
Option Register Attributes
XACS
shows signal behavior and system response for a write access.
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
ACS
00
10
11
00
10
11
00
10
11
00
10
11
00
10
11
00
10
11
00
10
11
00
10
11
CSNT
Table 14-23. GPCM Write Control Signal Timing
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
Address to LCS n
Asserted
1+1/4
1+1/2
1+1/4
1+1/2
1/4
1/2
1/4
1/2
0
0
1
2
0
0
1
2
0
0
2
3
0
0
2
3
LCS n Negated to
Address Change
Signal Behavior (Bus Clock Cycles)
–1–1/4
–1–1/4
–1–1/4
–1–1/4
–1/4
–1/4
–1/4
–1/4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Address/Data Invalid
LWE Negated to
–1–1/4
–1–1/4
–1–1/4
–1–1/4
–1–1/4
–1–1/4
–1/4
–1/4
–1/4
–1/4
–1/4
–1/4
0
0
0
0
0
0
0
0
0
0
0
0
Freescale Semiconductor
Total Cycles
3+2*SCY
4+2*SCY
4+2*SCY
3+2*SCY
4+2*SCY
5+2*SCY
4+2*SCY
5+2*SCY
5+2*SCY
4+2*SCY
5+2*SCY
6+2*SCY
3+SCY
3+SCY
3+SCY
3+SCY
3+SCY
4+SCY
3+SCY
3+SCY
3+SCY
3+SCY
3+SCY
4+SCY
1
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