MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 904

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Enhanced Three-Speed Ethernet Controllers
15.6.7.2
Data is presented to the eTSEC for transmission by arranging it in memory buffers referenced by the
TxBDs. In the TxBD the user initializes the R, PAD, W, I, L, TC, PRE, HFE, CF, and TOE bits and the
length (in bytes) in the first word, and the buffer pointer in the second word. Unused fields or fields written
by the eTSEC must be initialized to zero. For transmission over the FIFO interface the Ethernet specific
bits (PRE, DEF, HFE, LC, CF, RL and RC) have no meaning.
15-174
Transmit Data Buffer Descriptors (TxBD)
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Memory Map
RxBD Table
TxBD Table
(RBASE n )
(TBASE n )
Pointer
Pointer
Figure 15-134. Example of eTSEC Memory Structure for BDs
Beginning BD pointer
Figure 15-135. Buffer Descriptor Ring
W = 1
4
System Memory
Table for Ring n
Table for Ring n
0
Rx Buffer
Tx Buffer
RxBD
TxBD
3
1
2
Status & Control
Status & Control
Buffer Pointer
Buffer Pointer
Data Length
Data Length
Tx Buffer Descriptors
Rx Buffer Descriptors
Freescale Semiconductor