MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 657
MPC8533EVTARJ
Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTARJ
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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Table 14-24
14.4.2.2
The banks selected to work with the GPCM support an option to drive the LCSn signal with different
timings (with respect to the external address/data bus). LCSn can be driven in any of the following ways:
Freescale Semiconductor
•
1
Simultaneous with the latched memory address. (This refers to the externally latched address, not
the address timing on LAD[0:31]. That is, chip select does not assert during LALE).
TRLX
Total cycles when LALE is asserted for one cycle only (OR n [EAD] = 0; OR n [EAD] = 1 and
LCRR[EADC] = 01). Asserting LALE for more than one cycle increases the total cycle count accordingly.
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
shows the signal behavior and system response for a read access.
Option Register Attributes
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Chip-Select Assertion Timing
EHTR
0
0
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
XACS
Table 14-24. GPCM Read Control Signal Timing
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
ACS
00
10
11
00
10
11
00
10
11
00
10
11
00
10
11
00
10
11
00
10
11
00
10
11
LCS n Asserted
Address to
1+1/4
1+1/2
1+1/4
1+1/2
1/4
1/2
1/4
1/2
0
0
1
2
0
0
1
2
0
0
2
3
0
0
2
3
Signal Behavior (Bus Clock Cycles)
LCS n Negated to
Address Change
1
1
1
1
1
1
2
2
2
2
2
2
5
5
5
5
5
5
9
9
9
9
9
9
Total Cycles
10+2*SCY
12+2*SCY
13+2*SCY
13+2*SCY
12+2*SCY
13+2*SCY
14+2*SCY
8+2*SCY
9+2*SCY
9+2*SCY
8+2*SCY
9+2*SCY
4+SCY
4+SCY
4+SCY
4+SCY
4+SCY
5+SCY
5+SCY
5+SCY
5+SCY
5+SCY
5+SCY
6+SCY
Local Bus Controller
1
14-39
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