MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 1134
MPC8533EVTARJ
Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTARJ
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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PCI Express Interface Controller
18.3.10.7 PCI Express Advanced Error Capabilities and Control Register—0x118
The PCI Express advanced error capabilities and control register is shown in
18-86
Offset 0x118
Reset
Reset
W
W
R
R
31
15
0
0
31–13
11–9
31–9
Bits
Bits
5–1
4–0
12
8
7
6
0
8
7
6
5
0
0
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Figure 18-108. PCI Express Advanced Error Capabilities and Control Register
Table 18-101. PCI Express Correctable Error Mask Register Field Description
0
0
Table 18-102. PCI Express Advanced Error Capabilities and Control
First Error Pointer
—
0
0
ECRCGC
ECRCCE
ECRCCC
ECRCGE
BDLLPM
RTTOM
BTLPM
RNRM
RXEM
Name
Name
—
—
—
—
0
0
0
0
0
0
9
Reserved
Replay timer timeout mask
Reserved
REPLAY_NUM Rollover mask
Bad DLLP mask
Bad TLP mask
Reserved
Receiver error mask
Reserved.
ECRC checking enable.
ECRC checking capable.
ECRC generation enable.
ECRC generation capable.
The First Error Pointer is a read-only register that identifies the bit
position of the first error reported in the Uncorrectable Error Status
register.
ECRCCE
Register Field Description
0
0
8
ECRCCC
0
1
7
—
ECRCGE
0
0
6
Description
Description
ECRCGC
0
1
5
0
4
0
Figure
First Error Pointer
0
0
Freescale Semiconductor
18-108.
Access: Read/Write
0
0
0
0
16
0
0
0
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