MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 1118
MPC8533EVTARJ
Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTARJ
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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PCI Express Interface Controller
18.3.9.5
The PCI Express capability ID register is shown in
18.3.9.6
The PCI Express capabilities register is shown in
18-70
Offset 0x4C
Reset
Offset 0x4E
Reset
W
R
W
R
15–14
13–9
Bits
7–4
3–0
15
0
8
0
7
—
PCI Express Capability ID Register—0x4C
PCI Express Capabilities Register—0x4E
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Bits
7–0
Interrupt Message Number If this function is allocated more than one MSI interrupt number, then this
14
0
Capability Version
Device/Port Type
PCI Express Capability ID PCI Express = 0x10
Table 18-78. PCI Express Capability ID Register Field Description
Table 18-79. PCI Express Capabilities Register Field Description
13
0
Interrupt Message Number
0
Name
Slot
—
Name
0
Figure 18-83. PCI Express Capability ID Register
Figure 18-84. PCI Express Capabilities Register
0
0
Reserved
register is required to contain the offset between the base Message Data
and the MSI Message that is generated when any of the status bits in
either the Slot Status register or the Root Port Status register, of this
capability structure, are set.
Slot Implemented (RC mode only)
0100 (RC mode)
0000 (EP mode)
Indicates the defined PCI Express capability structure version number.
Must be 1h for this specification.
0
PCI Express Capability ID
0
1
Figure
Slot
Figure
8
0
18-84.
0
7
18-83.
Device/Port Type
0
Description
Description
n
0
0
0
4
3
0
Freescale Semiconductor
0
Access: Read-only
0
Version
Access: Read-only
0
0
0
1
0
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