MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 1009
MPC8533EVTARJ
Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTARJ
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 17-24
17.3.2.2
The PCI device ID register, shown in
17.3.2.3
The 2-byte PCI bus command register provides control over the ability to generate and respond to PCI
cycles.
Freescale Semiconductor
Offset 0x04
Reset 0 0 0 0 0 0
Offset 0x02
Reset
W
15–10
R
Bits
W
R
9
PCI:
15
Table 17-26
15–0
15–0
15
Bits
Bits
0
back-to-back
describes PCI vendor ID register fields.
PCI Device ID Register—Offset 0
PCI Bus Command Register—Offset 0
Name
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
—
*0 = Agent, 1 = Host
Fast
—
0
describes the bits of the PCI bus command register.
10
0
Vendor ID
Device ID
Table 17-26. PCI Bus Command Register Field Descriptions
Reserved
Hard-wired to 0, indicating that this PCI controller (as a master) does not run fast back-to-back
transactions.
Name
Name
back-to-back SERR — Parity error
Table 17-24. PCI Vendor ID Register Field Description
Table 17-25. PCI Device ID Register Field Description
Fast
0
0
9
Figure 17-27. PCI Bus Command Register
0
Figure 17-26. PCI Device ID Register
0x1957 (Freescale)
0x0030
0x0031
Figure
0
8
0
0
7
17-26, is used to identify the device.
response
0
MPC8533E (with security)
MPC8533 (without security)
0
6
Device ID
0
x
—
0
5
02
Description
0
Memory-write-
and-invalidate
Description
Description
x
04
0
4
0
1
Special
cycles Bus master Memory
0
3
1
0
2
*
Access: Read only
0
space
PCI Bus Interface
0
1
Access: Mixed
0
I/O space
0
0
n
17-31
0
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